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yy3588: fix eDP video port and timing, document panel requirement #508

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Merged
SuperKali merged 2 commits into from
Jul 5, 2026
Merged

yy3588: fix eDP video port and timing, document panel requirement #508

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ff6b9b0
arm64: dts: rockchip: overlay: yy3588: fix eDP video port and timing
SuperKali Jul 5, 2026
0e45a19
arm64: dts: rockchip: overlay: yy3588: note panel requirement in over…
SuperKali Jul 5, 2026
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2 changes: 1 addition & 1 deletion arch/arm64/boot/dts/rockchip/overlay/youyeetoo-yy3588-display-dsi0.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -15,7 +15,7 @@
title = "Enable DSI0 Display on Youyeetoo YY3588";
compatible = "youyeetoo,yy3588";
category = "display";
description = "Enable 7 inch 1024x600 MIPI DSI0 display with GT911 touchscreen";
description = "Enable 7 inch 1024x600 MIPI DSI0 display with GT911 touchscreen. Enable this overlay only with the panel connected or the display subsystem stalls at boot";
};

fragment@0 {
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2 changes: 1 addition & 1 deletion arch/arm64/boot/dts/rockchip/overlay/youyeetoo-yy3588-display-dsi1.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -15,7 +15,7 @@
title = "Enable DSI1 Display on Youyeetoo YY3588";
compatible = "youyeetoo,yy3588";
category = "display";
description = "Enable 7 inch 1024x600 MIPI DSI1 display with GT911 touchscreen";
description = "Enable 7 inch 1024x600 MIPI DSI1 display with GT911 touchscreen. Enable this overlay only with the panel connected or the display subsystem stalls at boot";
};

fragment@0 {
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30 changes: 26 additions & 4 deletions arch/arm64/boot/dts/rockchip/overlay/youyeetoo-yy3588-display-edp.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -14,7 +14,7 @@
title = "Enable eDP Display on Youyeetoo YY3588";
compatible = "youyeetoo,yy3588";
category = "display";
description = "Enable 11.6 inch 1920x1080 eDP display with GT928 touchscreen";
description = "Enable 11.6 inch 1920x1080 eDP display with GT928 touchscreen. The panel HPD line is not wired (force-hpd), enable this overlay only with the panel connected or the display subsystem stalls at boot";
};

fragment@0 {
Expand Down Expand Up @@ -84,6 +84,9 @@
height-mm = <144>;
status = "okay";

/* BOE QV116FHB-N81 datasheet typical timing. The EDID
* preferred 147.7MHz mode flickers on this eDP link.
*/
panel-timing {
clock-frequency = <141500000>;
hactive = <1920>;
Expand Down Expand Up @@ -161,15 +164,15 @@
target = <&edp1_in_vp1>;

__overlay__ {
status = "okay";
status = "disabled";
};
};

fragment@6 {
target = <&edp1_in_vp2>;

__overlay__ {
status = "disabled";
status = "okay";
};
};

Expand All @@ -178,7 +181,26 @@

__overlay__ {
status = "okay";
connect = <&vp1_out_edp1>;
connect = <&vp2_out_edp1>;
};
};

/* dp0 owns VP2 in the board DTS; hand it VP1 so eDP can use VP2,
* matching the vendor VOP port mux arrangement.
*/
fragment@10 {
target = <&dp0_in_vp2>;

__overlay__ {
status = "disabled";
};
};

fragment@11 {
target = <&dp0_in_vp1>;

__overlay__ {
status = "okay";
};
};

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