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fix(stopi): fix siprios should be masked by sie or hie#6128

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fix-siprios
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fix(stopi): fix siprios should be masked by sie or hie#6128
sinceforYy wants to merge 1 commit into
kunminghu-v2from
fix-siprios

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@github-actions github-actions Bot added module: backend Decode, Rename, Issue, Dispatch, Rob, Alu, Csr, fudian, yunsuan topic: functionality To introduce new function, e.g. new isa extensions, new components, bug fixes... labels Jun 24, 2026
@sinceforYy sinceforYy marked this pull request as ready for review June 25, 2026 01:29
@sinceforYy sinceforYy requested a review from Copilot June 25, 2026 01:29

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Pull request overview

This PR fixes the masking logic for S-level AIA interrupt priority registers (siprio*) so that their effective outputs are masked by either sie or hie (consistent with HS-level interrupt enable behavior), and wires hie through the existing HasIeBundle plumbing.

Changes:

  • Update siprio0/siprio2/siprios mask generation to use sie | hie instead of only sie.
  • Extend HasIeBundle to include hie and connect it from NewCSR to all iregiprios modules.

Reviewed changes

Copilot reviewed 2 out of 2 changed files in this pull request and generated no comments.

File Description
src/main/scala/xiangshan/backend/fu/NewCSR/NewCSR.scala Connects hie.regOut into all CSR modules that mix in HasIeBundle, ensuring the new input is driven.
src/main/scala/xiangshan/backend/fu/NewCSR/CSRAIA.scala Masks siprio* outputs by sie OR hie, and adds hie to HasIeBundle so the mask can be computed correctly.

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[Generated by IPC robot]
commit: cbb9bf6

commit astar copy_and_run coremark gcc gromacs hmmer-Vector lbm linux mcf microbench milc namd povray wrf xalancbmk
cbb9bf6 1.802 0.440 2.638 1.234 2.149 1.808 2.151 2.359 0.932 1.408 1.514 3.103 2.544 2.270 3.314

kunminghu-v2 branch:

commit astar copy_and_run coremark gcc gromacs hmmer-Vector lbm linux mcf microbench milc namd povray wrf xalancbmk
2acbf32 1.802 0.440 2.638 1.234 2.149 1.808 2.151 2.359 0.932 1.408 1.514 3.103 2.544 2.270 3.314
098fa58 1.802 0.440 2.638 1.234 2.149 1.808 2.151 2.359 0.932 1.408 1.514 3.103 2.544 2.270 3.314
5b82411 1.802 0.440 2.638 1.234 2.149 1.810 2.151 2.359 0.932 1.408 1.514 3.103 2.544 2.270 3.314
38aedc2 1.802 0.440 2.638 1.234 2.149 1.810 2.151 2.359 0.932 1.408 1.514 3.103 2.544 2.270 3.314
7ce99d4 1.802 0.440 2.638 1.234 2.149 1.810 2.151 2.359 0.932 1.408 1.514 3.103 2.544 2.270 3.314
9f988c0 1.802 0.440 2.638 1.234 2.149 1.808 2.151 2.359 0.932 1.408 1.514 3.103 2.544 2.270 3.314
a178aa5 1.802 0.440 2.638 1.234 2.149 1.808 2.151 2.359 0.932 1.408 1.514 3.103 2.544 2.270 3.314

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module: backend Decode, Rename, Issue, Dispatch, Rob, Alu, Csr, fudian, yunsuan topic: functionality To introduce new function, e.g. new isa extensions, new components, bug fixes...

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3 participants