[codex] Add standalone SC switch

configs/common/xiangshan.py

@@ -881,6 +881,12 @@ def xiangshan_system_init():
         default=False,
         help="Use BTBTAGEUpperBound in kmhv3 instead of the default BTBTAGE",
     )
+    parser.add_argument(
+        "--standalone-sc",
+        action="store_true",
+        default=False,
+        help="Disable direction TAGE sources in kmhv3 and force MGSC standalone SC prediction",
+    )
 
     # Add the ruby specific and protocol specific args
     if '--ruby' in sys.argv:

configs/example/kmhv3.py

@@ -113,6 +113,13 @@ def setKmhV3Params(args, system):
             cpu.branchPred.mgsc.enabled = True
             cpu.branchPred.ras.enabled = True
 
+            if getattr(args, 'standalone_sc', False):
+                cpu.branchPred.microtage.enabled = False
+                cpu.branchPred.tage.enabled = False
+
+                cpu.branchPred.mgsc.forceUseSC = True
+                cpu.branchPred.mgsc.allowMissingTageInfo = True
+
         # l1 cache per core
         if args.caches:
             cpu.icache.size = '64kB'

src/cpu/pred/BranchPredictor.py

@@ -1174,6 +1174,8 @@ class BTBMGSC(TimedBaseBTBPredictor):
 
     # Test switches for SC tables
     forceUseSC = Param.Bool(False, "Force use SC prediction, ignore TAGE confidence")
+    allowMissingTageInfo = Param.Bool(
+        False, "Allow MGSC to run with default TAGE metadata when TAGE info is unavailable")
     enableBwTable = Param.Bool(True, "Enable BW (backward) table")
     enableLTable = Param.Bool(False, "Enable L (local) table")
     enableITable = Param.Bool(True, "Enable I (IMLI) table")

src/cpu/pred/btb/btb_mgsc.cc

@@ -1,6 +1,7 @@
 #include "cpu/pred/btb/btb_mgsc.hh"
 
 #include "base/intmath.hh"
+#include "base/logging.hh"
 
 #ifdef UNIT_TEST
 #include "cpu/pred/btb/test/test_dprintf.hh"
@@ -173,6 +174,7 @@ BTBMGSC::BTBMGSC()
       // This models "read a whole SRAM line, then pick a lane" behavior in `posHash()`.
       numCtrsPerLine(8),
       forceUseSC(false),
+      allowMissingTageInfo(false),
       enableBwTable(true),
       enableLTable(true),
       enableITable(true),
@@ -217,6 +219,7 @@ BTBMGSC::BTBMGSC(const Params &p)
       weightTableIdxWidth(p.weightTableIdxWidth),
       numCtrsPerLine(p.numCtrsPerLine),
       forceUseSC(p.forceUseSC),
+      allowMissingTageInfo(p.allowMissingTageInfo),
       enableBwTable(p.enableBwTable),
       enableLTable(p.enableLTable),
       enableITable(p.enableITable),
@@ -542,15 +545,18 @@ BTBMGSC::lookupHelper(const Addr &startPC, const std::vector<BTBEntry> &btbEntri
         // Only predict for valid conditional branches
         if (btb_entry.isCond && btb_entry.valid) {
             auto tage_info = tageInfoForMgscs.find(btb_entry.pc);
-            if (tage_info != tageInfoForMgscs.end()) {
-                auto pred = generateSinglePrediction(btb_entry, startPC,
-                                                     tage_info->second, tid,
-                                                     asidHash);
-                threadMeta[tid]->preds[btb_entry.pc] = pred;
-                results.push_back({btb_entry.pc, pred.taken || btb_entry.alwaysTaken});
-            } else {
-                assert(false);
-            }
+            panic_if(tage_info == tageInfoForMgscs.end() && !allowMissingTageInfo,
+                     "MGSC missing TAGE info for conditional branch pc %#lx "
+                     "startPC %#lx tid %u asidHash %#x",
+                     btb_entry.pc, startPC, static_cast<unsigned>(tid),
+                     static_cast<unsigned>(asidHash));
+
+            const TageInfoForMGSC missing_tage_info;
+            const auto &info =
+                tage_info != tageInfoForMgscs.end() ? tage_info->second : missing_tage_info;
+            auto pred = generateSinglePrediction(btb_entry, startPC, info, tid, asidHash);
+            threadMeta[tid]->preds[btb_entry.pc] = pred;
+            results.push_back({btb_entry.pc, pred.taken || btb_entry.alwaysTaken});
         }
     }
 }

src/cpu/pred/btb/btb_mgsc.hh

@@ -361,6 +361,7 @@ class BTBMGSC : public TimedBaseBTBPredictor
 
     // Test switches for SC tables
     bool forceUseSC;
+    bool allowMissingTageInfo;
     bool enableBwTable;
     bool enableLTable;
     bool enableITable;
@@ -537,6 +538,7 @@ class BTBMGSC : public TimedBaseBTBPredictor
         static unsigned biasTableIdxWidth(const BTBMGSC &mgsc) { return mgsc.biasTableIdxWidth; }
 
         static bool &forceUseSC(BTBMGSC &mgsc) { return mgsc.forceUseSC; }
+        static bool &allowMissingTageInfo(BTBMGSC &mgsc) { return mgsc.allowMissingTageInfo; }
         static bool &enableBwTable(BTBMGSC &mgsc) { return mgsc.enableBwTable; }
         static bool &enableLTable(BTBMGSC &mgsc) { return mgsc.enableLTable; }
         static bool &enableITable(BTBMGSC &mgsc) { return mgsc.enableITable; }

src/cpu/pred/btb/test/btb_mgsc.test.cc

@@ -730,6 +730,51 @@ TEST(BTBMGSCTest, BiasTableLearnsTwoTageContexts)
     EXPECT_GE(acc, 0.90) << "Accuracy too low for two-context bias learning: " << acc;
 }
 
+TEST(BTBMGSCTest, MissingTageInfoUsesDefaultFallbackContext)
+{
+    MgscHarness h;
+    h.setOnlyBiasTable();
+    BTBMGSC::TestAccess::allowMissingTageInfo(h.mgsc) = true;
+
+    const TageInfoForMGSC fallback_ctx;
+
+    const Addr start_pc = 0x1000;
+    const Addr branch_pc = 0x1000;
+    auto entry = makeCondBTBEntry(branch_pc);
+
+    setAllTableCountersForPc(h.mgsc, start_pc, branch_pc, fallback_ctx,
+                             /*bw=*/0, /*l=*/0, /*i=*/0, /*g=*/0, /*p=*/0,
+                             /*bias=*/4);
+
+    boost::dynamic_bitset<> history(64, 0);
+    std::vector<FullBTBPrediction> stage_preds(2);
+    for (auto &pred : stage_preds) {
+        pred.bbStart = start_pc;
+        pred.btbEntries = {entry};
+        pred.tageInfoForMgscs.clear();
+    }
+
+    h.mgsc.putPCHistory(start_pc, history, stage_preds);
+
+    auto [found, taken] = findCondTaken(stage_preds[1].condTakens, branch_pc);
+    ASSERT_TRUE(found);
+    EXPECT_TRUE(taken);
+
+    const auto &preds = BTBMGSC::TestAccess::preds(h.mgsc);
+    auto it = preds.find(branch_pc);
+    ASSERT_NE(it, preds.end());
+    EXPECT_TRUE(it->second.use_mgsc);
+    EXPECT_FALSE(it->second.taken_before_sc);
+    EXPECT_FALSE(it->second.tage_conf_low);
+
+    const auto [expected_bias_idx, _] =
+        lineLaneForBiasIndex(h.mgsc, start_pc, branch_pc,
+                             BTBMGSC::TestAccess::biasTableIdxWidth(h.mgsc),
+                             fallback_ctx);
+    ASSERT_FALSE(it->second.biasIndex.empty());
+    EXPECT_EQ(it->second.biasIndex[0], expected_bias_idx);
+}
+
 TEST(BTBMGSCTest, LTableLearnsTwoIndependentLocalHistories)
 {
     MgscHarness h;