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CaoJiaming776 wants to merge 48 commits into from
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Split utage align #747

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8b347a1
cpu-o3: split microtage out of tage
Jan 6, 2026
21e138e
cpu-o3: enhance branch index calculation in MicroTAGE to handle edge …
Jan 6, 2026
60eae32
cpu-o3: update blockWidth calculation to handle zero blockSize
Jan 6, 2026
fecdabc
cpu-o3: adjust MicroTAGE parameters and clean up code for clarity
Jan 8, 2026
d7fa29a
cpu-o3: remove unused variable 'usingBasetable'
Jan 8, 2026
f9cca0d
cpu-o3: MicroTAGE to remove base table and alternative prediction
Jan 9, 2026
5fe5469
cpu-o3: update MicroTAGE parameters for consistency
Jan 9, 2026
1aec0a7
cpu-o3: remove alternative prediction logic
Jan 12, 2026
8fd8fc7
cpu-o3: refine MicroTAGE parameters and remove unused variables
Jan 13, 2026
944da39
cpu-o3: update MicroTAGE history length parameter to 16
Jan 13, 2026
f03b7f4
cpu-o3: update MicroTAGE history length parameter to 25
Jan 15, 2026
c2f040d
cpu-o3: update MicroTAGE history length parameter to 37
Jan 15, 2026
009227c
cpu-o3: update MicroTAGE history length parameter to 56
Jan 15, 2026
41ce5d6
cpu-o3: update MicroTAGE history length parameter to 32
Jan 16, 2026
eed7f24
cpu-o3: update MicroTAGE history length parameter to 20
Jan 16, 2026
9d023af
cpu-o3: update MicroTAGE history length parameter to 18
Jan 16, 2026
4d3f393
cpu-o3: modify MicroTAGE to include alternative tag history
Jan 16, 2026
890ae5d
cpu-o3: enhance MicroTAGE statistics to track utage prediction accuracy
Jan 16, 2026
07c7651
cpu-o3: update MicroTAGE prediction latency to 1 cycle
Jan 16, 2026
68f78ee
cpu-o3: enable update on read and adjust prediction latency
Jan 16, 2026
452048c
cpu-o3: disable update on read for MicroTAGE predictor
Jan 16, 2026
e6a3c2b
cpu-o3: update MicroTAGE prediction latency to 1 cycle
Jan 16, 2026
f9c9a0e
cpu-o3: add recovery for alternative tag folded history
Jan 23, 2026
18724cf
cpu-o3:change utage delay to 0
Jan 23, 2026
80a1758
cpu-o3: adjust MicroTAGE parameters and clean up code for clarity
Jan 8, 2026
b1dd1da
cpu-o3: enhance MicroTAGE statistics to track utage prediction accuracy
Jan 16, 2026
99fb5c3
cpu-o3: update MicroTAGE prediction latency to 1 cycle
Jan 16, 2026
ee62b7d
cpu-o3: enable update on read and adjust prediction latency
Jan 16, 2026
a10c85c
cpu-o3: disable update on read for MicroTAGE predictor
Jan 16, 2026
b4d5a1e
cpu-o3: update MicroTAGE prediction latency to 1 cycle
Jan 16, 2026
e64b1f7
cpu-o3: enable MicroTAGE predictor in align configuration
Jan 23, 2026
b738237
cpu-o3: adjust MicroTAGE prediction latency to 0 cycles
Jan 23, 2026
6ae7c35
cpu-o3: update MicroTAGE parameters for improved configuration
Jan 26, 2026
4af55c9
cpu-o3: disable MicroTAGE and ABTB predictors
Jan 30, 2026
0b3974f
cpu-o3: disable bank conflict simulation in MicroTAGE predictor
Feb 2, 2026
c33388a
cpu-o3: enable ABTB and MicroTAGE predictors in branch prediction
Feb 2, 2026
c9412f0
cpu-o3: disable MicroTAGE predictor in branch prediction
Feb 2, 2026
223032b
cpu-o3: enable MicroTAGE predictor and increase table sizes
Feb 2, 2026
b566938
cpu-o3: decrease utage tag wide
Feb 2, 2026
12719e3
cpu-o3: increase TTagBitSizes for MicroTAGE predictor12
Feb 2, 2026
090a556
cpu-o3: increase Tag for MicroTAGE predictor from 12 to 13
Feb 3, 2026
8bead16
cpu-o3: update TTagBitSizes 11 for MicroTAGE predictor
Feb 3, 2026
5174a63
cpu-o3: increase table sizes and way for MicroTAGE predictor
Feb 3, 2026
d4dad8f
cpu-o3:4 table 1024 2way utag
Feb 3, 2026
6d0a1ca
cpu-o3: 4 table 1024 2way utag
Feb 3, 2026
537cda4
cpu-o3: abtb update commit
Feb 3, 2026
fd84870
cpu-o3: tage no bankconflict ,abtb us s3pred
Feb 5, 2026
fd4c0ea
cpu-o3: disable S3 predictor for uBTB updates
Feb 5, 2026
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2 changes: 1 addition & 1 deletion configs/example/kmhv3.py
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Original file line number Diff line number Diff line change
Expand Up @@ -101,7 +101,7 @@ def setKmhV3Params(args, system):

cpu.branchPred.ubtb.enabled = True
cpu.branchPred.abtb.enabled = True
cpu.branchPred.microtage.enabled = False
cpu.branchPred.microtage.enabled = True
cpu.branchPred.mbtb.enabled = True
cpu.branchPred.tage.enabled = True
cpu.branchPred.ittage.enabled = True
Expand Down
38 changes: 27 additions & 11 deletions src/cpu/pred/BranchPredictor.py
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Original file line number Diff line number Diff line change
Expand Up @@ -1060,16 +1060,32 @@ class BTBTAGE(TimedBaseBTBPredictor):
enableBankConflict = Param.Bool(True, "Enable bank conflict simulation")
numDelay = 2

class MicroTAGE(BTBTAGE):
"""A smaller TAGE predictor configuration to assist uBTB"""
enableSC = Param.Bool(False, "Enable SC or not") # TODO: BTBTAGE doesn't support SC
numPredictors = 1
tableSizes = [512]
TTagBitSizes = [16]
TTagPcShifts = [1]

histLengths = [16]
numDelay = 0
class MicroTAGE(TimedBaseBTBPredictor):
"""Micro-sized BTB TAGE predictor used alongside uBTB"""
type = 'MicroTAGE'
cxx_class = 'gem5::branch_prediction::btb_pred::MicroTAGE'
cxx_header = "cpu/pred/btb/microtage.hh"

needMoreHistories = Param.Bool(True, "MicroTAGE needs more histories")
updateOnRead = Param.Bool(False,"Enable update on read, no need to save tage meta in FTQ")
# Keep vector parameters consistent with numPredictors to avoid constructor asserts.
numPredictors = Param.Unsigned(1, "Number of TAGE predictors")
tableSizes = VectorParam.Unsigned([512]*2,"the TAGE T0~Tn length")
TTagBitSizes = VectorParam.Unsigned([16]*2 ,"the T0~Tn entry's tag bit size")
TTagPcShifts = VectorParam.Unsigned([1]*2 ,"when the T0~Tn entry's tag generating, PC right shift")
blockSize = Param.Unsigned(32,"tage index function uses 32B aligned block address")

histLengths = VectorParam.Unsigned([9,18],"the BTB TAGE T0~Tn history length")
maxHistLen = Param.Unsigned(970,"The length of history passed from DBP")
numTablesToAlloc = Param.Unsigned(1,"The number of table to allocated each time")
numWays = Param.Unsigned(1, "Number of ways per set")
baseTableSize = Param.Unsigned(256,"Base table size")
maxBranchPositions = Param.Unsigned(32,"Maximum branch positions per 64-byte block")
useAltOnNaSize = Param.Unsigned(128,"Size of the useAltOnNa table")
useAltOnNaWidth = Param.Unsigned(7,"Width of the useAltOnNa table")
numBanks = Param.Unsigned(4,"Number of banks for bank conflict simulation")
enableBankConflict = Param.Bool(True,"Enable bank conflict simulation")
numDelay = Param.Unsigned(0,"Prediction latency in cycles")
Comment on lines +1063 to +1088

@coderabbitai coderabbitai Bot Jan 30, 2026

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⚠️ Potential issue | 🟠 Major

Parameter count mismatch: numPredictors=1 but vector parameters have 2 elements.

The comment on line 1071 states "Keep vector parameters consistent with numPredictors to avoid constructor asserts", but:

  • numPredictors = 1
  • tableSizes = [512]*2 (2 elements)
  • TTagBitSizes = [16]*2 (2 elements)
  • TTagPcShifts = [1]*2 (2 elements)
  • histLengths = [9,18] (2 elements)

This inconsistency may cause unexpected behavior. Either increase numPredictors to 2 or reduce the vector sizes to 1 element.

🔧 Suggested fix (Option A: increase numPredictors) 
-    numPredictors = Param.Unsigned(1, "Number of TAGE predictors")
-    tableSizes = VectorParam.Unsigned([512]*2,"the TAGE T0~Tn length")
+    numPredictors = Param.Unsigned(2, "Number of TAGE predictors")
+    tableSizes = VectorParam.Unsigned([512]*2,"the TAGE T0~Tn length")
🔧 Suggested fix (Option B: reduce vector sizes) 
-    tableSizes = VectorParam.Unsigned([512]*2,"the TAGE T0~Tn length")
-    TTagBitSizes = VectorParam.Unsigned([16]*2 ,"the T0~Tn entry's tag bit size")
-    TTagPcShifts = VectorParam.Unsigned([1]*2 ,"when the T0~Tn entry's tag generating, PC right shift")
+    tableSizes = VectorParam.Unsigned([512],"the TAGE T0~Tn length")
+    TTagBitSizes = VectorParam.Unsigned([16],"the T0~Tn entry's tag bit size")
+    TTagPcShifts = VectorParam.Unsigned([1],"when the T0~Tn entry's tag generating, PC right shift")
     ...
-    histLengths = VectorParam.Unsigned([9,18],"the BTB TAGE T0~Tn history length")
+    histLengths = VectorParam.Unsigned([9],"the BTB TAGE T0~Tn history length")
🧰 Tools
🪛 Ruff (0.14.14)

[error] 1069-1069: Param may be undefined, or defined from star imports

(F405)

[error] 1070-1070: Param may be undefined, or defined from star imports

(F405)

[error] 1072-1072: Param may be undefined, or defined from star imports

(F405)

[error] 1073-1073: VectorParam may be undefined, or defined from star imports

(F405)

[error] 1074-1074: VectorParam may be undefined, or defined from star imports

(F405)

[error] 1075-1075: VectorParam may be undefined, or defined from star imports

(F405)

[error] 1076-1076: Param may be undefined, or defined from star imports

(F405)

[error] 1078-1078: VectorParam may be undefined, or defined from star imports

(F405)

[error] 1079-1079: Param may be undefined, or defined from star imports

(F405)

[error] 1080-1080: Param may be undefined, or defined from star imports

(F405)

[error] 1081-1081: Param may be undefined, or defined from star imports

(F405)

[error] 1082-1082: Param may be undefined, or defined from star imports

(F405)

[error] 1083-1083: Param may be undefined, or defined from star imports

(F405)

[error] 1084-1084: Param may be undefined, or defined from star imports

(F405)

[error] 1085-1085: Param may be undefined, or defined from star imports

(F405)

[error] 1086-1086: Param may be undefined, or defined from star imports

(F405)

[error] 1087-1087: Param may be undefined, or defined from star imports

(F405)

[error] 1088-1088: Param may be undefined, or defined from star imports

(F405)

🤖 Prompt for AI Agents 
In `@src/cpu/pred/BranchPredictor.py` around lines 1063 - 1088, The MicroTAGE
class has mismatched parameter counts: numPredictors is 1 but vector params
tableSizes, TTagBitSizes, TTagPcShifts, and histLengths have 2 elements, which
can trigger constructor asserts; fix by making these consistent—either set
numPredictors = 2 to match the two-element vectors or shrink each VectorParam
(tableSizes, TTagBitSizes, TTagPcShifts, histLengths) to a single-element list
to match numPredictors = 1; update the explanatory comment ("Keep vector
parameters...") accordingly so numPredictors and all vector lengths are always
aligned.


class BTBITTAGE(TimedBaseBTBPredictor):
type = 'BTBITTAGE'
Expand Down Expand Up @@ -1169,7 +1185,7 @@ class DecoupledBPUWithBTB(BranchPredictor):
numStages = Param.Unsigned(4, "Maximum number of stages in the pipeline")
ubtb = Param.UBTB(UBTB(), "UBTB predictor")
abtb = Param.AheadBTB(AheadBTB(), "ABTB predictor")
microtage = Param.BTBTAGE(MicroTAGE(), "MicroTAGE predictor to assist uBTB")
microtage = Param.MicroTAGE(MicroTAGE(), "MicroTAGE predictor to assist uBTB")
mbtb = Param.MBTB(MBTB(), "MBTB predictor")
tage = Param.BTBTAGE(BTBTAGE(), "TAGE predictor")
ittage = Param.BTBITTAGE(BTBITTAGE(), "ITTAGE predictor")
Expand Down
4 changes: 3 additions & 1 deletion src/cpu/pred/SConscript
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Original file line number Diff line number Diff line change
Expand Up @@ -49,7 +49,8 @@ SimObject('BranchPredictor.py', sim_objects=[
'DecoupledStreamBPU', 'DefaultFTB', 'DecoupledBPUWithFTB',
'TimedBaseFTBPredictor', 'FTBTAGE', 'FTBRAS', 'FTBuRAS', 'FTBITTAGE',
'AheadBTB', 'MBTB', 'UBTB', 'DecoupledBPUWithBTB',
'TimedBaseBTBPredictor', 'BTBRAS', 'BTBTAGE', 'BTBITTAGE', 'BTBMGSC'], enums=["BpType"])
'TimedBaseBTBPredictor', 'BTBRAS', 'BTBTAGE', 'MicroTAGE',
'BTBITTAGE', 'BTBMGSC'], enums=["BpType"])

DebugFlag('Indirect')
Source('bpred_unit.cc')
Expand Down Expand Up @@ -100,6 +101,7 @@ Source('btb/abtb.cc')
Source('btb/mbtb.cc')
Source('btb/timed_base_pred.cc')
Source('btb/btb_tage.cc')
Source('btb/microtage.cc')
Source('btb/btb_ittage.cc')
Source('btb/btb_mgsc.cc')
Source('btb/folded_hist.cc')
Expand Down
3 changes: 2 additions & 1 deletion src/cpu/pred/btb/decoupled_bpred.hh
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Original file line number Diff line number Diff line change
Expand Up @@ -19,6 +19,7 @@
#include "cpu/pred/btb/mbtb.hh"
#include "cpu/pred/btb/btb_ittage.hh"
#include "cpu/pred/btb/btb_tage.hh"
#include "cpu/pred/btb/microtage.hh"
#include "cpu/pred/btb/btb_ubtb.hh"
#include "cpu/pred/btb/btb_mgsc.hh"
#include "cpu/pred/btb/jump_ahead_predictor.hh"
Expand Down Expand Up @@ -94,7 +95,7 @@ class DecoupledBPUWithBTB : public BPredUnit
UBTB *ubtb{};
AheadBTB *abtb{};
MBTB *mbtb{};
BTBTAGE *microtage{};
MicroTAGE *microtage{};
BTBTAGE *tage{};
BTBITTAGE *ittage{};
BTBMGSC *mgsc{};
Expand Down
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