Search results

LPDDR5 model's open row policy is incompatible with all bank refresh

Status: Open.

#128 In CMU-SAFARI/ramulator2;

· pbirchxtx opened on Jun 22, 2026

differences between gddr6 model in main branch 2.0 and v2.1

Status: Open.

#121 In CMU-SAFARI/ramulator2;

· dahmadjid opened on Jun 16, 2026

DRAM Ramulator2 simulation time in gem5 keep 50.02%

Status: Open.

#72 In CMU-SAFARI/ramulator2;

· The-CliffWu opened on Dec 8, 2024

Multi-channel Ramulator + GEM5

Status: Open.

#69 In CMU-SAFARI/ramulator2;

· arkhadem opened on Oct 21, 2024

SimpleO3 front end show significant Cache bandwidth bound when doing sequential memory access test.

Status: Open.

#49 In CMU-SAFARI/ramulator2;

· zzczzc20 opened on Jun 17, 2024

Invalid Condition in BH controller

Status: Open.

#45 In CMU-SAFARI/ramulator2;

· Arash1381-y opened on May 10, 2024