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all_block_fields, many_lints, and no_prelude tests, plus remove UnsafeRead/UnsafeWrite mentions ci #97: Pull request #38 opened by jrvanwhy
1m 24s jrvanwhy:tests_3
jrvanwhy:tests_3
1m 24s
Add FakeRegister and FakeRegisterArray. ci #96: Pull request #37 opened by jrvanwhy
1m 26s jrvanwhy:fake_register
jrvanwhy:fake_register
1m 26s
Try 3 at sound and testable register definitions. ci #95: Pull request #11 synchronize by jrvanwhy
1m 36s jrvanwhy:mod-interface
jrvanwhy:mod-interface
1m 36s
Add the mmio test and generics example. ci #94: Pull request #36 opened by jrvanwhy
1m 22s jrvanwhy:more_tests_examples
jrvanwhy:more_tests_examples
1m 22s
Try 3 at sound and testable register definitions. ci #93: Pull request #11 synchronize by jrvanwhy
1m 33s jrvanwhy:mod-interface
jrvanwhy:mod-interface
1m 33s
Add the multi_crate test. ci #92: Pull request #32 synchronize by jrvanwhy
1m 19s jrvanwhy:multi_crate
jrvanwhy:multi_crate
1m 19s
Add the doc_comments and typestate examples. ci #91: Pull request #34 opened by jrvanwhy
54s jrvanwhy:examples_1
jrvanwhy:examples_1
54s
Tests: nested_arrays, same_names, send_register ci #90: Pull request #33 opened by jrvanwhy
1m 2s jrvanwhy:tests_1
jrvanwhy:tests_1
1m 2s
Add the multi_crate test. ci #89: Pull request #32 opened by jrvanwhy
1m 2s jrvanwhy:multi_crate
jrvanwhy:multi_crate
1m 2s
Add expand_macros. ci #88: Pull request #31 opened by jrvanwhy
1m 27s jrvanwhy:expand_macros
jrvanwhy:expand_macros
1m 27s
Add the register_map! macro. ci #87: Pull request #30 opened by jrvanwhy
42s jrvanwhy:register_map
jrvanwhy:register_map
42s
Try 3 at sound and testable register definitions. ci #86: Pull request #11 synchronize by jrvanwhy
1m 31s jrvanwhy:mod-interface
jrvanwhy:mod-interface
1m 31s
Add register block code generation. ci #85: Pull request #27 synchronize by jrvanwhy
1m 2s jrvanwhy:block
jrvanwhy:block
1m 2s
Try 3 at sound and testable register definitions. ci #84: Pull request #11 synchronize by jrvanwhy
1m 34s jrvanwhy:mod-interface
jrvanwhy:mod-interface
1m 34s
Add the UnsafeRead and UnsafeWrite operations. ci #83: Pull request #29 opened by jrvanwhy
1m 0s jrvanwhy:unsafe_ops
jrvanwhy:unsafe_ops
1m 0s
Add the Mmio buses and mmio*_register_map! macros. ci #82: Pull request #28 opened by jrvanwhy
55s jrvanwhy:mmio
jrvanwhy:mmio
55s
Try 3 at sound and testable register definitions. ci #81: Pull request #11 synchronize by jrvanwhy
1m 33s jrvanwhy:mod-interface
jrvanwhy:mod-interface
1m 33s
Try 3 at sound and testable register definitions. ci #80: Pull request #11 synchronize by jrvanwhy
1m 35s jrvanwhy:mod-interface
jrvanwhy:mod-interface
1m 35s
Add register block code generation. ci #79: Pull request #27 opened by jrvanwhy
55s jrvanwhy:block
jrvanwhy:block
55s
Add code generation for single registers. ci #78: Pull request #26 opened by jrvanwhy
56s jrvanwhy:single
jrvanwhy:single
56s
Try 3 at sound and testable register definitions. ci #77: Pull request #11 synchronize by jrvanwhy
1m 19s jrvanwhy:mod-interface
jrvanwhy:mod-interface
1m 19s
Add register_map! documentation. ci #76: Pull request #18 synchronize by jrvanwhy
55s jrvanwhy:docs
jrvanwhy:docs
55s
Add register_map! documentation. ci #75: Pull request #18 synchronize by jrvanwhy
1m 0s jrvanwhy:docs
jrvanwhy:docs
1m 0s
Add the safe register_map! operations: Read, Write, and ReadWrite. ci #74: Pull request #24 synchronize by jrvanwhy
56s jrvanwhy:safe_ops
jrvanwhy:safe_ops
56s
Add array-related traits and types. ci #73: Pull request #25 synchronize by jrvanwhy
1m 1s jrvanwhy:array
jrvanwhy:array
1m 1s