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Enable optimized-baseline benchmark on Intel XPU#1512

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WenjiaoYue wants to merge 2 commits into
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WenjiaoYue:feat/optimized-baseline-xpu
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Enable optimized-baseline benchmark on Intel XPU#1512
WenjiaoYue wants to merge 2 commits into
llm-d:mainfrom
WenjiaoYue:feat/optimized-baseline-xpu

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@WenjiaoYue

@WenjiaoYue WenjiaoYue commented Jun 17, 2026

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Enable optimized-baseline benchmark on Intel XPU.

  • config/scenarios/guides/optimized-baseline-xpu.yaml: XPU scenario (accelerator intel-xe, device=xpu, --enforce-eager, RWO storage for kind, podSecurityContext supplementalGroups for /dev/dri access, Qwen3-0.6B).
  • config/specification/guides/optimized-baseline-xpu.yaml.j2: spec pointing at the XPU scenario (mirrors optimized-baseline.yaml.j2).
  • config/templates/jinja/13_ms-values.yaml.j2: indent the first line of decode/prefill podSecurityContext so supplementalGroups renders as valid nested YAML (previously the first key landed at column 0). Required by the XPU scenario; no-op for scenarios that do not set podSecurityContext.

Add an Intel XPU (gpu.intel.com/xe, classic device plugin) variant of the
optimized-baseline guide so the scenario runs on Intel GPUs.

- config/scenarios/guides/optimized-baseline-xpu.yaml: XPU scenario
  (accelerator intel-xe, device=xpu, --enforce-eager, RWO storage for kind,
  podSecurityContext supplementalGroups for /dev/dri access, Qwen3-0.6B).
- config/specification/guides/optimized-baseline-xpu.yaml.j2: spec pointing
  at the XPU scenario (mirrors optimized-baseline.yaml.j2).
- config/templates/jinja/13_ms-values.yaml.j2: indent the first line of
  decode/prefill podSecurityContext so supplementalGroups renders as valid
  nested YAML (previously the first key landed at column 0). Required by the
  XPU scenario; no-op for scenarios that do not set podSecurityContext.

Signed-off-by: WenjiaoYue <wenjiao.yue@intel.com>
Copilot AI review requested due to automatic review settings June 17, 2026 14:48
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Pull request overview

Enables running the “optimized-baseline” benchmark variant on Intel XPU by introducing a dedicated XPU scenario/spec and adjusting the modelservice values template so podSecurityContext renders as valid nested YAML when provided.

Changes:

  • Add an Intel XPU scenario (optimized-baseline-xpu) targeting gpu.intel.com/xe, using an XPU vLLM image and XPU-specific vllm serve flags (including --enforce-eager).
  • Add a corresponding specification file that points to the new XPU scenario.
  • Fix Jinja indentation for decode/prefill.podSecurityContext so the first rendered key is correctly indented under podSecurityContext:.

Reviewed changes

Copilot reviewed 3 out of 3 changed files in this pull request and generated 1 comment.

File Description
config/templates/jinja/13_ms-values.yaml.j2 Fixes YAML rendering for podSecurityContext by indenting the first line of the dumped YAML.
config/specification/guides/optimized-baseline-xpu.yaml.j2 Adds a spec entry that selects the XPU optimized-baseline scenario.
config/scenarios/guides/optimized-baseline-xpu.yaml Introduces the Intel XPU scenario (accelerator, image, command, storage, and security context).

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size: 50Gi
maxModelLen: 16000
blockSize: 16
gpuMemoryUtilization: 0.9
Introduce a shared config/templates/values/overlays/xpu.yaml carrying the
machine-related deltas (accelerator, images, decode/prefill acceleratorType)
so every XPU guide can reuse it instead of duplicating per-guide YAML.

Add a values_overlays mechanism to the renderer (render_plans.py + cli.py)
that deep-merges overlays declared under values_file.overlays onto defaults,
before the guide scenario and CLI overrides.

Slim optimized-baseline-xpu scenario to keep only guide-specific bits and
wire the overlay in via the specification's values_file.overlays.

Signed-off-by: WenjiaoYue <wenjiao.yue@intel.com>
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