Hey there! I’m Adityaa Mehra, an Electronics Engineering student at IIT (BHU), Varanasi. I’m super passionate about Artificial Intelligence , accelerators micro-acrchitechture and neuromorphics. These fields excite me, and I’m always exploring how they’ll shape the future of tech!
Studying and having fun
As a burgeoning scholar, I am immersing myself in the vast domain of coding, with the intent to expand my knowledge and hone my expertise.
- Kanpur , India
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16:09
(UTC +05:30) - https://adityaamehra.me
- in/adityaa-mehra
- @AdityaaMehra
Highlights
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RV32IM-pipelined
RV32IM-pipelined PublicThis is a basic 5 stage pipelined RV32IM based ISA following CPU core
Verilog 7
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riscv32I-single-cycle
riscv32I-single-cycle PublicThis is the single cycle RiscV RV32I ISA following CPU unit written in verilog.
Verilog
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