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4e1d883
Add dynamic runtime sequence operations to AIEX dialect
jgmelber Feb 20, 2026
58e3d15
Add standalone TXN encoding library and EmitC-based C++ code generation
jgmelber Mar 11, 2026
ec123b2
Merge dynamic and static TXN paths to remove duplication
jgmelber Mar 11, 2026
a48a3ed
Add dynamic-size runtime TXN demo: compile once, run at any size
jgmelber Mar 11, 2026
1bb1992
clang-format
jgmelber Mar 11, 2026
73d54a9
Unify static and dynamic AIEX ops, eliminate Dyn op duplication
jgmelber Mar 12, 2026
f017bcf
Add IRON-level dynamic runtime support: RuntimeScalar, write_rtp, dyn…
jgmelber Mar 12, 2026
88de190
Move dynamic GEMM designs to single_core_dynamic/, add placed variant…
jgmelber Mar 12, 2026
3f8bcd3
Extract RTP address from static instructions instead of hardcoding
jgmelber Mar 12, 2026
6c28cc9
clang-format and black formatting
jgmelber Mar 12, 2026
0155ebd
Add dynamic TXN generation for runtime-configurable GEMM
jgmelber Mar 26, 2026
544aec0
Fix dynamic TXN generation after rebase on main
jgmelber Mar 26, 2026
39fed19
Address code review: fix correctness bugs and clean up
jgmelber Mar 26, 2026
0066a60
Reset cmake/modulesXilinx submodule to match main
jgmelber Mar 26, 2026
93acc43
Fix linker error: add AIETransforms dependency to AIETargets
jgmelber Mar 26, 2026
c97ce07
Remove IsolatedFromAbove from RuntimeSequenceOp, fix CI test failures
jgmelber Mar 26, 2026
5286ec4
Fix Python formatting for CI (black)
jgmelber Mar 26, 2026
934d90b
Reset cmake/modulesXilinx submodule to match main
jgmelber Mar 26, 2026
84a7704
Format Python files to match CI black version
jgmelber Mar 26, 2026
1fa8774
Clean branch for PR: remove hand-written TXN, stage all changes
jgmelber May 5, 2026
93c6450
Merge remote-tracking branch 'origin/main' into dynamic-runtime-seque…
jgmelber May 5, 2026
ba6319d
Fix critical and blocker issues from PR review
jgmelber May 5, 2026
0e9e2fe
Address remaining PR review findings: performance, code quality, docs
jgmelber May 5, 2026
90ab0cd
Fix remaining PR review items: docs, validation, code quality
jgmelber May 5, 2026
2b63765
Add FileCheck test coverage for EmitC TXN C++ generation (M7)
jgmelber May 5, 2026
fe0ba91
Fix passthrough dynamic Makefile: use aiecc instead of aie-translate
jgmelber May 5, 2026
2943c94
Format C++ and Python files for CI (clang-format, black)
jgmelber May 5, 2026
8da783e
Scope SCF-to-CF conversion to aie.core ops only (M3)
jgmelber May 5, 2026
240b7b3
Fix CI format check: clang-format and black
jgmelber May 5, 2026
88c66ee
Fix remaining clang-format issues
jgmelber May 5, 2026
bdf4d07
Fix Python formatting for CI (black 26.3.1)
jgmelber May 5, 2026
1c58970
Reformat test files with black 26.3.1 to match CI
jgmelber May 5, 2026
f6e8a06
Fix buffer_resolution.py FileCheck: update rtp_write assembly format
jgmelber May 5, 2026
b8cafe9
Add lit test for dynamic GEMM TXN generation
jgmelber May 5, 2026
606ca9f
Add NPU1 (Phoenix) support and lit tests for dynamic TXN examples
jgmelber May 5, 2026
e508bb5
Support SSA i32 in npu.dma_memcpy_nd and lower floordivsi to EmitC
jgmelber May 6, 2026
1531551
Refactor single_core_dynamic.py as minimal delta over single_core.py
jgmelber May 6, 2026
e0d55eb
[WIP] testing and using blockwrites
jgmelber May 6, 2026
119053c
Collapse dynamic BD into a single blockwrite call
jgmelber May 6, 2026
5b59027
Keep dma_memcpy_nd at i64 + add static-vs-dynamic TXN equivalence test
jgmelber May 6, 2026
758ab3d
Apply clang-format to prior changes
jgmelber May 6, 2026
c06855d
Percolate dma_task to single_core_dynamic.py with dynamic repeat_count
jgmelber May 7, 2026
76af784
Fix placed & IRON dynamic GEMM variants
jgmelber Jun 4, 2026
dfc230e
Update placed variant to use current trace API
jgmelber Jun 4, 2026
44247cf
Parameterize placed GEMM runtime_sequence with SSA M/K/N inputs
jgmelber Jun 4, 2026
9f3392f
Differentiate unplaced and placed dynamic GEMM APIs
jgmelber Jun 4, 2026
f8808ce
Align import ordering between dynamic GEMM variants
jgmelber Jun 4, 2026
f319889
Align RTP buffer size between dynamic GEMM variants
jgmelber Jun 4, 2026
977588d
Fix d0_stride underflow and clean up review findings
jgmelber Jun 4, 2026
733cbfc
Add MemTile negative test and document d2Size non-use
jgmelber Jun 4, 2026
51ea5c7
Address remaining review items: consolidate, document, test
jgmelber Jun 4, 2026
04d6660
Stage remaining tracked changes from branch
jgmelber Jun 4, 2026
1f9c4a8
Merge remote-tracking branch 'origin/main' into dynamic-runtime-seque…
jgmelber Jun 4, 2026
b785a8a
Add fallback defines for XAIE_IO_CREATE_SCRATCHPAD/UPDATE_REG
jgmelber Jun 4, 2026
1fbfa61
Add missing files: BdLowering.h header and test files
jgmelber Jun 5, 2026
3a791a3
Add compile-time warning for d0_size exceeding 10-bit limit
jgmelber Jun 5, 2026
fe0a776
Add bd_group attribute for robust EmitC blockwrite fusion
jgmelber Jun 5, 2026
66e2f15
Merge remote-tracking branch 'origin/main' into dynamic-runtime-seque…
jgmelber Jun 5, 2026
fc17ad8
Merge main and apply clang-format
jgmelber Jun 5, 2026
b017d7b
Remove half-baked IRON dynamic GEMM variant
jgmelber Jun 5, 2026
bd0cd83
Address PR review comments: document placeholder intent and CSE fix
jgmelber Jun 5, 2026
2d45492
Fix clang-format-17 formatting for CI
jgmelber Jun 5, 2026
7a6e9a0
Fix duplicate tile creation in DMAStartTaskOpPattern
jgmelber Jun 5, 2026
5cc5919
Merge remote-tracking branch 'origin/main' into dynamic-runtime-seque…
jgmelber Jun 5, 2026
5938fc6
Merge branch 'main' into dynamic-runtime-sequences
jgmelber Jun 5, 2026
20161e3
Touchups
jgmelber Jun 5, 2026
8a011f5
Revert unrelated changes to minimize PR diff
jgmelber Jun 5, 2026
a594f13
Fix copyright years on new files to 2026
jgmelber Jun 5, 2026
6b9a106
Fix stale CHECK string in cpp_dynamic_txn.mlir
jgmelber Jun 5, 2026
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25 changes: 25 additions & 0 deletions include/aie/Conversion/AIEXToEmitC/AIEXToEmitC.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,25 @@
//===- AIEXToEmitC.h - AIEX to EmitC conversion -----------------*- C++ -*-===//
//
// This file is licensed under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
// (c) Copyright 2026 Advanced Micro Devices, Inc.
//
//===----------------------------------------------------------------------===//

#ifndef AIE_CONVERSION_AIEXTOEMITC_AIEXTOEMITC_H
#define AIE_CONVERSION_AIEXTOEMITC_AIEXTOEMITC_H

#include "mlir/IR/BuiltinOps.h"
#include "mlir/Pass/Pass.h"
#include <memory>

namespace xilinx {

std::unique_ptr<mlir::OperationPass<mlir::ModuleOp>>
createConvertAIEXToEmitCPass();

} // namespace xilinx

#endif // AIE_CONVERSION_AIEXTOEMITC_AIEXTOEMITC_H
1 change: 1 addition & 0 deletions include/aie/Conversion/Passes.h
Original file line number Diff line number Diff line change
Expand Up @@ -13,6 +13,7 @@

#include "aie/Conversion/AIEToConfiguration/AIEToConfiguration.h"
#include "aie/Conversion/AIEVecToLLVM/AIEVecToLLVM.h"
#include "aie/Conversion/AIEXToEmitC/AIEXToEmitC.h"
#include "aie/Conversion/PassesEnums.h.inc"

namespace xilinx {
Expand Down
24 changes: 24 additions & 0 deletions include/aie/Conversion/Passes.td
Original file line number Diff line number Diff line change
Expand Up @@ -104,4 +104,28 @@ def ConvertAIEToControlPackets : Pass<"convert-aie-to-control-packets",
];
}

//===----------------------------------------------------------------------===//
// AIEXToEmitC
//===----------------------------------------------------------------------===//

def ConvertAIEXToEmitC : Pass<"convert-aiex-to-emitc", "mlir::ModuleOp"> {
let summary = "Convert AIEX dynamic runtime sequence ops to EmitC dialect";
let description = [{
This pass converts AIEX runtime sequence operations (write32, maskwrite32,
sync — including their dynamic operand forms) along with static NPU ops,
SCF control flow, and arith operations into EmitC dialect ops. The
resulting EmitC IR can be translated to C++ code via translateToCpp()
that calls functions from the standalone TxnEncoding.h library to
generate TXN binaries at runtime.
}];
let constructor = "xilinx::createConvertAIEXToEmitCPass()";
let dependentDialects = ["mlir::emitc::EmitCDialect",
"mlir::arith::ArithDialect",
"mlir::func::FuncDialect",
"mlir::memref::MemRefDialect",
"mlir::scf::SCFDialect",
"xilinx::AIE::AIEDialect",
"xilinx::AIEX::AIEXDialect"];
}

#endif // AIE_CONVERSION_PASSES
50 changes: 47 additions & 3 deletions include/aie/Dialect/AIE/IR/AIEOps.td
Original file line number Diff line number Diff line change
Expand Up @@ -887,7 +887,7 @@ def AIE_DMABDPACKETOp: AIE_Op<"dma_bd_packet", []> {
}];
}

def AIE_DMABDOp: AIE_Op<"dma_bd", []> {
def AIE_DMABDOp: AIE_Op<"dma_bd", [AttrSizedOperandSegments]> {
let summary = "Declare a dma buffer descriptor op";
let description = [{
This operation describes a buffer descriptor for DMA operations. In particular, it specifies
Expand Down Expand Up @@ -997,10 +997,36 @@ def AIE_DMABDOp: AIE_Op<"dma_bd", []> {
counts can be supplied to the `dma_bd` through an optional argument, an array of "tuple-like" attributes
`bd_pad_layout<const_pad_before, const_pad_after>`, followed by an optional argument `const_val` (default
is 0). All counts are expressed in multiples of the element width.

#### Dynamic operands (SSA `i64`)

`dma_bd` accepts optional SSA `i64` overrides for the offset, length, and the
sizes/strides of the data-layout transformation:

* `dyn_offset` overrides the static `offset` attribute (in element-width units).
* `dyn_len` overrides the static `len` attribute (in element-width units).
* `dyn_sizes` and `dyn_strides` together override the static `dimensions`
attribute. They are *all-or-nothing*: either both are empty (and
`dimensions` is used), or both have the same non-empty length and the
static `dimensions` attribute must be absent. To reuse a static value in
a dimension, the user passes an `arith.constant` SSA value, which the
downstream lowering folds back to a constant word field.

Dynamic operands are restricted to shim NOC tiles because the dynamic
lowering emits per-word `npu.write32` ops that target the runtime sequence
on the shim. The user is responsible for ensuring the inner-most stride is 1
(this cannot be checked statically when expressed via SSA), and for
respecting the hardware d0 wrap-size 10-bit limit.

`pad_dimensions` is incompatible with dynamic operands.
}];

let arguments = (
ins AnyRankedOrUnrankedMemRef:$buffer,
Optional<I64>:$dyn_offset,
Optional<I64>:$dyn_len,
Variadic<I64>:$dyn_sizes,
Variadic<I64>:$dyn_strides,
// in multiples of element width (not bytes)
DefaultValuedAttr<AIEI32Attr, "0">:$offset,
// in multiples of element width (not bytes)
Expand All @@ -1026,6 +1052,8 @@ def AIE_DMABDOp: AIE_Op<"dma_bd", []> {
return dataLayout.getTypeSize(bufferType.getElementType());
}
uint64_t getLenInBytes() {
assert(!getDynLen() && "getLenInBytes called on dma_bd with dynamic len; "
"the caller must take the dynamic-lowering path");
if (std::optional<int32_t> len = getLen(); len.has_value())
return static_cast<uint64_t>(static_cast<uint32_t>(len.value())) *
static_cast<uint64_t>(getBufferElementTypeWidthInBytes());
Expand All @@ -1046,50 +1074,66 @@ def AIE_DMABDOp: AIE_Op<"dma_bd", []> {
let builders = [
OpBuilder<(ins "mlir::Value":$buffer, "int":$offset, "int":$len), [{
$_state.addOperands(buffer);
$_state.addAttribute(getOperandSegmentSizeAttr(),
$_builder.getDenseI32ArrayAttr({1, 0, 0, 0, 0}));
$_state.addAttribute("offset", $_builder.getI32IntegerAttr(offset));
$_state.addAttribute("len", $_builder.getI32IntegerAttr(len));
}]>,
OpBuilder<(ins "mlir::Value":$buffer, "int":$offset, "int":$len, "BDDimLayoutArrayAttr":$dims), [{
$_state.addOperands(buffer);
$_state.addAttribute(getOperandSegmentSizeAttr(),
$_builder.getDenseI32ArrayAttr({1, 0, 0, 0, 0}));
$_state.addAttribute("offset", $_builder.getI32IntegerAttr(offset));
$_state.addAttribute("len", $_builder.getI32IntegerAttr(len));
$_state.addAttribute("dimensions", dims);
}]>,
OpBuilder<(ins "mlir::Value":$buffer, "int":$offset, "int":$len, "BDPadLayoutArrayAttr":$paddims), [{
$_state.addOperands(buffer);
$_state.addAttribute(getOperandSegmentSizeAttr(),
$_builder.getDenseI32ArrayAttr({1, 0, 0, 0, 0}));
$_state.addAttribute("offset", $_builder.getI32IntegerAttr(offset));
$_state.addAttribute("len", $_builder.getI32IntegerAttr(len));
$_state.addAttribute("pad_dimensions", paddims);
}]>,
OpBuilder<(ins "mlir::Value":$buffer, "int":$offset, "int":$len, "BDDimLayoutArrayAttr":$dims, "BDPadLayoutArrayAttr":$paddims), [{
$_state.addOperands(buffer);
$_state.addAttribute(getOperandSegmentSizeAttr(),
$_builder.getDenseI32ArrayAttr({1, 0, 0, 0, 0}));
$_state.addAttribute("offset", $_builder.getI32IntegerAttr(offset));
$_state.addAttribute("len", $_builder.getI32IntegerAttr(len));
$_state.addAttribute("dimensions", dims);
$_state.addAttribute("pad_dimensions", paddims);
}]>,
OpBuilder<(ins "mlir::Value":$buffer, "int":$offset, "int":$len, "PacketInfoAttr":$pkt), [{
$_state.addOperands(buffer);
$_state.addAttribute(getOperandSegmentSizeAttr(),
$_builder.getDenseI32ArrayAttr({1, 0, 0, 0, 0}));
$_state.addAttribute("offset", $_builder.getI32IntegerAttr(offset));
$_state.addAttribute("len", $_builder.getI32IntegerAttr(len));
$_state.addAttribute("packet", pkt);
}]>,
OpBuilder<(ins "mlir::Value":$buffer, "int":$offset, "int":$len, "BDDimLayoutArrayAttr":$dims, "PacketInfoAttr":$pkt), [{
$_state.addOperands(buffer);
$_state.addAttribute(getOperandSegmentSizeAttr(),
$_builder.getDenseI32ArrayAttr({1, 0, 0, 0, 0}));
$_state.addAttribute("offset", $_builder.getI32IntegerAttr(offset));
$_state.addAttribute("len", $_builder.getI32IntegerAttr(len));
$_state.addAttribute("dimensions", dims);
$_state.addAttribute("packet", pkt);
}]>,
OpBuilder<(ins "mlir::Value":$buffer, "int":$offset, "int":$len, "BDPadLayoutArrayAttr":$paddims, "PacketInfoAttr":$pkt), [{
$_state.addOperands(buffer);
$_state.addAttribute(getOperandSegmentSizeAttr(),
$_builder.getDenseI32ArrayAttr({1, 0, 0, 0, 0}));
$_state.addAttribute("offset", $_builder.getI32IntegerAttr(offset));
$_state.addAttribute("len", $_builder.getI32IntegerAttr(len));
$_state.addAttribute("pad_dimensions", paddims);
$_state.addAttribute("packet", pkt);
}]>,
OpBuilder<(ins "mlir::Value":$buffer, "int":$offset, "int":$len, "BDDimLayoutArrayAttr":$dims, "BDPadLayoutArrayAttr":$paddims, "PacketInfoAttr":$pkt), [{
$_state.addOperands(buffer);
$_state.addAttribute(getOperandSegmentSizeAttr(),
$_builder.getDenseI32ArrayAttr({1, 0, 0, 0, 0}));
$_state.addAttribute("offset", $_builder.getI32IntegerAttr(offset));
$_state.addAttribute("len", $_builder.getI32IntegerAttr(len));
$_state.addAttribute("dimensions", dims);
Expand Down Expand Up @@ -2247,8 +2291,8 @@ def AIE_BDChainOp: AIE_Op<"bd_chain", [Symbol, SkipAccessibilityCheckTrait]> {

def AIE_RuntimeSequenceOp : AIE_Op<"runtime_sequence", [
Symbol,
NoTerminator,
HasParent<"DeviceOp">,
NoTerminator,
HasParent<"DeviceOp">,
]> {
let summary = "Program the configuration co-processor of the AI Engine array";
let description = [{
Expand Down
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