refactor riscv gemm microkernel#6752
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Codecov Report❌ Patch coverage is
Additional details and impacted files@@ Coverage Diff @@
## master #6752 +/- ##
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+ Coverage 95.69% 95.78% +0.09%
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Files 944 947 +3
Lines 410509 412957 +2448
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+ Hits 392834 395569 +2735
+ Misses 17675 17388 -287 ☔ View full report in Codecov by Harness. 🚀 New features to boost your workflow:
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@codex review |
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@codex review |
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| for (; jj + 7 < max_jj; jj += 8) | ||
| { | ||
| if (elempack == packn) | ||
| { | ||
| const int q = (j + jj) / packn * packn; | ||
| const int r = (j + jj) % packn; | ||
| const float* p0 = (const float*)B + k * B_hstep + q * packn + r * packn; | ||
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| if (packn == 8) |
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Handle the 8-column tail when packn is 16
On RVV targets where csrr_vlenb() / 4 == 16, this new 8-column tail loop can run for transB == 0, B.elempack == packn, and an unpacked column count with an 8..15 remainder after the 16-wide blocks. The loop advances jj by 8, but the elempack == packn body only writes data for packn == 8 or packn == 4, so for packn == 16 pp is not advanced and those B columns are never packed; the following 4/2/1 tails cannot recover them, causing GEMM to read stale/misaligned BT data. Please add a packn == 16 path for this width or let the smaller tail loops handle it.
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| Mat ATX(TILE_K * TILE_M, (K + TILE_K - 1) / TILE_K, nT, 2u, opt.workspace_allocator); | ||
| if (ATX.empty()) | ||
| return -100; |
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