wave_top

#! /c/Source/iverilog-install/bin/vvp
:ivl_version "12.0 (devel)" "(s20150603-1539-g2693dd32b)";
:ivl_delay_selection "TYPICAL";
:vpi_time_precision - 12;
:vpi_module "D:\iverilog\lib\ivl\system.vpi";
:vpi_module "D:\iverilog\lib\ivl\vhdl_sys.vpi";
:vpi_module "D:\iverilog\lib\ivl\vhdl_textio.vpi";
:vpi_module "D:\iverilog\lib\ivl\v2005_math.vpi";
:vpi_module "D:\iverilog\lib\ivl\va_math.vpi";
S_000002b865b3f170 .scope module, "tb_top_receiver" "tb_top_receiver" 2 3;
 .timescale -9 -12;
P_000002b8656ce150 .param/l "CLK_PERIOD" 0 2 7, +C4<00000000000000000000000000001010>;
P_000002b8656ce188 .param/l "DATA_W" 0 2 6, +C4<00000000000000000000000000010000>;
P_000002b8656ce1c0 .param/l "NFFT" 0 2 8, +C4<00000000000000000000000001000000>;
v000002b865bcc680_0 .var/i "abs_err_x1_im", 31 0;
v000002b865bcdf80_0 .var/i "abs_err_x1_re", 31 0;
v000002b865bce020_0 .var/i "abs_err_x2_im", 31 0;
v000002b865bcd440_0 .var/i "abs_err_x2_re", 31 0;
v000002b865bce0c0_0 .var/s "adc1_im", 15 0;
v000002b865bce2a0_0 .var/s "adc1_re", 15 0;
v000002b865bcea20_0 .var/s "adc2_im", 15 0;
v000002b865bcca40_0 .var/s "adc2_re", 15 0;
v000002b865bcc9a0_0 .var "clk", 0 0;
v000002b865bccae0_0 .net/s "cpe_phase_err_dbg", 15 0, L_000002b865673360;  1 drivers
v000002b865bcd6c0_0 .net "cpe_phase_valid_dbg", 0 0, L_000002b865ac12a0;  1 drivers
v000002b865bccfe0_0 .var "expected_bits", 3 0;
v000002b865bcd120_0 .var/s "g_x1_im", 15 0;
v000002b865bce3e0_0 .var/s "g_x1_re", 15 0;
v000002b865bce480_0 .var/s "g_x2_im", 15 0;
v000002b865bce660_0 .var/s "g_x2_re", 15 0;
v000002b865bcd4e0_0 .var/s "gz_x1_im", 15 0;
v000002b865bce700_0 .var/s "gz_x1_re", 15 0;
v000002b865bce7a0_0 .var/s "gz_x2_im", 15 0;
v000002b865bcf9c0_0 .var/s "gz_x2_re", 15 0;
v000002b865bcf420_0 .var/s "h00_im", 15 0;
v000002b865bcf6a0_0 .var/s "h00_re", 15 0;
v000002b865bcfec0_0 .var/s "h01_im", 15 0;
v000002b865bd0280_0 .var/s "h01_re", 15 0;
v000002b865bcf740_0 .var/s "h10_im", 15 0;
v000002b865bcf7e0_0 .var/s "h10_re", 15 0;
v000002b865bcf240_0 .var/s "h11_im", 15 0;
v000002b865bcf380_0 .var/s "h11_re", 15 0;
v000002b865bcfe20_0 .var/i "i", 31 0;
v000002b865bd0000_0 .var "in_valid", 0 0;
v000002b865bd03c0_0 .var/i "max_err_x1_im", 31 0;
v000002b865bcf4c0_0 .var/i "max_err_x1_re", 31 0;
v000002b865bcef20_0 .var/i "max_err_x2_im", 31 0;
v000002b865bcf060_0 .var/i "max_err_x2_re", 31 0;
v000002b865bd00a0 .array "mem_final_out", 63 0, 63 0;
v000002b865bcefc0 .array "mem_h_inv", 3 0, 31 0;
v000002b865bcfc40 .array "mem_input_time", 63 0, 63 0;
v000002b865bd0320 .array "mem_zf_out", 63 0, 63 0;
v000002b865bcf2e0_0 .var/i "mismatch_cnt", 31 0;
v000002b865bcf560_0 .net/s "nco_acc_dbg", 15 0, L_000002b865a29ff0;  1 drivers
v000002b865bcfa60_0 .var/i "out_idx", 31 0;
v000002b865bcf100_0 .net "out_valid", 0 0, v000002b865bb3fa0_0;  1 drivers
v000002b865bcf1a0_0 .var "rst_n", 0 0;
v000002b865bcf600_0 .net "rx_bits", 3 0, v000002b865bb3c80_0;  1 drivers
v000002b865bd0460_0 .var "symbol_start", 0 0;
v000002b865bcf880_0 .var/i "zf_idx", 31 0;
v000002b865bcf920_0 .var/i "zf_mismatch_cnt", 31 0;
v000002b865bd0500_0 .net "zf_valid_dbg", 0 0, L_000002b865a2a990;  1 drivers
v000002b865bcee80_0 .net/s "zf_x1_im_dbg", 15 0, L_000002b865ac0ac0;  1 drivers
v000002b865bcff60_0 .net/s "zf_x1_re_dbg", 15 0, L_000002b865ac1460;  1 drivers
v000002b865bcfb00_0 .net/s "zf_x2_im_dbg", 15 0, L_000002b865ac05f0;  1 drivers
v000002b865bcfce0_0 .net/s "zf_x2_re_dbg", 15 0, L_000002b865abf860;  1 drivers
E_000002b865acd860 .event anyedge, v000002b865bcfa60_0;
E_000002b865acc960 .event anyedge, v000002b865ba8ea0_0;
S_000002b865b331b0 .scope function.vec4.u32, "abs16" "abs16" 2 180, 2 180 0, S_000002b865b3f170;
 .timescale -9 -12;
; Variable abs16 is vec4 return value of scope S_000002b865b331b0
v000002b865b266d0_0 .var/s "v", 15 0;
TD_tb_top_receiver.abs16 ;
    %load/vec4 v000002b865b266d0_0;
    %pad/s 32;
    %cmpi/s 0, 0, 32;
    %flag_mov 8, 5;
    %jmp/0 T_0.0, 8;
    %load/vec4 v000002b865b266d0_0;
    %pad/s 32;
    %inv;
    %pushi/vec4 1, 0, 32;
    %add;
    %jmp/1 T_0.1, 8;
T_0.0 ; End of true expr.
    %load/vec4 v000002b865b266d0_0;
    %pad/s 32;
    %jmp/0 T_0.1, 8;
 ; End of false expr.
    %blend;
T_0.1;
    %ret/vec4 0, 0, 32;  Assign to abs16 (store_vec4_to_lval)
    %end;
S_000002b865b33340 .scope module, "u_top" "mimo_ofdm_rx_top" 2 51, 3 1 0, S_000002b865b3f170;
 .timescale -9 -12;
    .port_info 0 /INPUT 1 "clk";
    .port_info 1 /INPUT 1 "rst_n";
    .port_info 2 /INPUT 1 "in_valid";
    .port_info 3 /INPUT 16 "adc1_re";
    .port_info 4 /INPUT 16 "adc1_im";
    .port_info 5 /INPUT 16 "adc2_re";
    .port_info 6 /INPUT 16 "adc2_im";
    .port_info 7 /INPUT 1 "symbol_start";
    .port_info 8 /INPUT 16 "h00_re";
    .port_info 9 /INPUT 16 "h00_im";
    .port_info 10 /INPUT 16 "h01_re";
    .port_info 11 /INPUT 16 "h01_im";
    .port_info 12 /INPUT 16 "h10_re";
    .port_info 13 /INPUT 16 "h10_im";
    .port_info 14 /INPUT 16 "h11_re";
    .port_info 15 /INPUT 16 "h11_im";
    .port_info 16 /OUTPUT 1 "out_valid";
    .port_info 17 /OUTPUT 4 "rx_bits";
    .port_info 18 /OUTPUT 1 "zf_valid_tap";
    .port_info 19 /OUTPUT 1 "cpe_phase_valid_tap";
    .port_info 20 /OUTPUT 16 "zf_x1_re_tap";
    .port_info 21 /OUTPUT 16 "zf_x1_im_tap";
    .port_info 22 /OUTPUT 16 "zf_x2_re_tap";
    .port_info 23 /OUTPUT 16 "zf_x2_im_tap";
    .port_info 24 /OUTPUT 16 "cpe_phase_err_tap";
    .port_info 25 /OUTPUT 16 "nco_acc_tap";
P_000002b8656cd860 .param/l "DATA_W" 0 3 2, +C4<00000000000000000000000000010000>;
P_000002b8656cd898 .param/l "S_READ" 1 3 122, +C4<00000000000000000000000000000001>;
P_000002b8656cd8d0 .param/l "S_WAIT" 1 3 122, +C4<00000000000000000000000000000000>;
L_000002b865a2a990 .functor BUFZ 1, v000002b865bcb910_0, C4<0>, C4<0>, C4<0>;
L_000002b865ac1460 .functor BUFZ 16, v000002b865bc9390_0, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>;
L_000002b865ac0ac0 .functor BUFZ 16, v000002b865bc9bb0_0, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>;
L_000002b865abf860 .functor BUFZ 16, v000002b865bca5b0_0, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>;
L_000002b865ac05f0 .functor BUFZ 16, v000002b865bc9f70_0, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>;
L_000002b865ac12a0 .functor BUFZ 1, v000002b865bb1450_0, C4<0>, C4<0>, C4<0>;
L_000002b865673360 .functor BUFZ 16, v000002b865bb19f0_0, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>;
v000002b865bcc1d0_0 .net/s "X1_im", 15 0, v000002b865bc9bb0_0;  1 drivers
v000002b865bcae70_0 .net/s "X1_re", 15 0, v000002b865bc9390_0;  1 drivers
v000002b865bcb4b0_0 .net/s "X1c_im", 15 0, v000002b865bb0c30_0;  1 drivers
v000002b865bcafb0_0 .net/s "X1c_re", 15 0, v000002b865bb0a50_0;  1 drivers
v000002b865bcc450_0 .net/s "X2_im", 15 0, v000002b865bc9f70_0;  1 drivers
v000002b865bcb5f0_0 .net/s "X2_re", 15 0, v000002b865bca5b0_0;  1 drivers
v000002b865bcbc30_0 .net/s "X2c_im", 15 0, v000002b865bb1090_0;  1 drivers
v000002b865bcb690_0 .net/s "X2c_re", 15 0, v000002b865bb0cd0_0;  1 drivers
v000002b865bcbcd0_0 .net/s "adc1_im", 15 0, v000002b865bce0c0_0;  1 drivers
v000002b865bcaf10_0 .net/s "adc1_re", 15 0, v000002b865bce2a0_0;  1 drivers
v000002b865bcbd70_0 .net/s "adc2_im", 15 0, v000002b865bcea20_0;  1 drivers
v000002b865bcbeb0_0 .net/s "adc2_re", 15 0, v000002b865bcca40_0;  1 drivers
v000002b865bcb870_0 .net/s "cfo_eps_hat", 15 0, v000002b865ba8fe0_0;  1 drivers
v000002b865bcbf50_0 .net "cfo_est_valid", 0 0, v000002b865ba89a0_0;  1 drivers
v000002b865bcbe10_0 .net "clk", 0 0, v000002b865bcc9a0_0;  1 drivers
v000002b865bcbff0_0 .net "cpe_out_valid", 0 0, v000002b865bb1270_0;  1 drivers
v000002b865bcc090_0 .net/s "cpe_phase_err", 15 0, v000002b865bb19f0_0;  1 drivers
v000002b865bceac0_0 .net/s "cpe_phase_err_tap", 15 0, L_000002b865673360;  alias, 1 drivers
v000002b865bcc720_0 .net "cpe_phase_valid", 0 0, v000002b865bb1450_0;  1 drivers
v000002b865bceca0_0 .net "cpe_phase_valid_tap", 0 0, L_000002b865ac12a0;  alias, 1 drivers
v000002b865bcd9e0_0 .net "fft1_done", 0 0, v000002b865bb9830_0;  1 drivers
v000002b865bcd760_0 .var/s "fft1_im_r", 15 0;
v000002b865bcd260_0 .net/s "fft1_out_im", 15 0, L_000002b865a2a0d0;  1 drivers
v000002b865bce980_0 .net/s "fft1_out_re", 15 0, L_000002b865a2a060;  1 drivers
v000002b865bcda80_0 .var/s "fft1_re_r", 15 0;
v000002b865bccd60_0 .net "fft2_done", 0 0, v000002b865bb75d0_0;  1 drivers
v000002b865bcd080_0 .var/s "fft2_im_r", 15 0;
v000002b865bce5c0_0 .net/s "fft2_out_im", 15 0, L_000002b865a2a680;  1 drivers
v000002b865bced40_0 .net/s "fft2_out_re", 15 0, L_000002b865a2a610;  1 drivers
v000002b865bccb80_0 .var/s "fft2_re_r", 15 0;
v000002b865bcdbc0_0 .var "fft_data_valid_d", 0 0;
v000002b865bcc7c0_0 .var "fft_done_latched", 0 0;
v000002b865bcc860_0 .var "fft_done_pending", 0 0;
v000002b865bcccc0_0 .var "fft_read_addr", 5 0;
v000002b865bccc20_0 .var "fft_read_en", 0 0;
v000002b865bcd1c0_0 .net/s "h00_im", 15 0, v000002b865bcf420_0;  1 drivers
v000002b865bcd800_0 .net/s "h00_re", 15 0, v000002b865bcf6a0_0;  1 drivers
v000002b865bcd300_0 .net/s "h01_im", 15 0, v000002b865bcfec0_0;  1 drivers
v000002b865bcdb20_0 .net/s "h01_re", 15 0, v000002b865bd0280_0;  1 drivers
v000002b865bce840_0 .net/s "h10_im", 15 0, v000002b865bcf740_0;  1 drivers
v000002b865bcdc60_0 .net/s "h10_re", 15 0, v000002b865bcf7e0_0;  1 drivers
v000002b865bcce00_0 .net/s "h11_im", 15 0, v000002b865bcf240_0;  1 drivers
v000002b865bce520_0 .net/s "h11_re", 15 0, v000002b865bcf380_0;  1 drivers
v000002b865bcd3a0_0 .net "in_valid", 0 0, v000002b865bd0000_0;  1 drivers
v000002b865bcdda0_0 .net/s "nco_acc_tap", 15 0, L_000002b865a29ff0;  alias, 1 drivers
v000002b865bce160_0 .net/s "nco_phase", 15 0, v000002b865bb7d50_0;  1 drivers
v000002b865bce200_0 .net "out_valid", 0 0, v000002b865bb3fa0_0;  alias, 1 drivers
v000002b865bcd8a0_0 .net/s "rot1_im", 15 0, v000002b865bbbae0_0;  1 drivers
v000002b865bce8e0_0 .net/s "rot1_re", 15 0, v000002b865bbbf40_0;  1 drivers
v000002b865bcc900_0 .net/s "rot2_im", 15 0, v000002b865bbc260_0;  1 drivers
v000002b865bcdd00_0 .net/s "rot2_re", 15 0, v000002b865bba820_0;  1 drivers
v000002b865bce340_0 .net "rot_valid", 0 0, v000002b865bbb720_0;  1 drivers
v000002b865bcede0_0 .net "rst_n", 0 0, v000002b865bcf1a0_0;  1 drivers
v000002b865bcd580_0 .net "rx_bits", 3 0, v000002b865bb3c80_0;  alias, 1 drivers
v000002b865bccea0_0 .var "state_read", 2 0;
v000002b865bceb60_0 .net "symbol_start", 0 0, v000002b865bd0460_0;  1 drivers
v000002b865bcec00_0 .net "zf_valid_out", 0 0, v000002b865bcb910_0;  1 drivers
v000002b865bcde40_0 .net "zf_valid_tap", 0 0, L_000002b865a2a990;  alias, 1 drivers
v000002b865bcd620_0 .net/s "zf_x1_im_tap", 15 0, L_000002b865ac0ac0;  alias, 1 drivers
v000002b865bcdee0_0 .net/s "zf_x1_re_tap", 15 0, L_000002b865ac1460;  alias, 1 drivers
v000002b865bcd940_0 .net/s "zf_x2_im_tap", 15 0, L_000002b865ac05f0;  alias, 1 drivers
v000002b865bccf40_0 .net/s "zf_x2_re_tap", 15 0, L_000002b865abf860;  alias, 1 drivers
S_000002b865a18090 .scope module, "u_cfo_est" "cfo_estimator_cp_mrc" 3 40, 4 1 0, S_000002b865b33340;
 .timescale -9 -12;
    .port_info 0 /INPUT 1 "clk";
    .port_info 1 /INPUT 1 "rst_n";
    .port_info 2 /INPUT 1 "in_valid";
    .port_info 3 /INPUT 1 "symbol_start";
    .port_info 4 /INPUT 16 "rx1_re";
    .port_info 5 /INPUT 16 "rx1_im";
    .port_info 6 /INPUT 16 "rx2_re";
    .port_info 7 /INPUT 16 "rx2_im";
    .port_info 8 /OUTPUT 1 "cfo_valid";
    .port_info 9 /OUTPUT 16 "cfo_eps_hat";
P_000002b8656ce620 .param/l "DATA_W" 0 4 2, +C4<00000000000000000000000000010000>;
P_000002b8656ce658 .param/l "NCP" 0 4 4, +C4<00000000000000000000000000010000>;
P_000002b8656ce690 .param/l "NFFT" 0 4 3, +C4<00000000000000000000000001000000>;
L_000002b865b13810 .functor BUFZ 6, v000002b865baa9b0_0, C4<000000>, C4<000000>, C4<000000>;
v000002b865ba7e60_0 .net/s *"_ivl_10", 16 0, L_000002b865bd2530;  1 drivers
v000002b865ba7be0_0 .net/s *"_ivl_12", 16 0, L_000002b865bd25d0;  1 drivers
v000002b865ba85e0_0 .net/s *"_ivl_16", 16 0, L_000002b865bd1d10;  1 drivers
v000002b865ba7640_0 .net/s *"_ivl_18", 16 0, L_000002b865bd11d0;  1 drivers
L_000002b865c10088 .functor BUFT 1, C4<0000000000000000>, C4<0>, C4<0>, C4<0>;
v000002b865ba91c0_0 .net *"_ivl_2", 15 0, L_000002b865c10088;  1 drivers
v000002b865ba7820_0 .net *"_ivl_22", 31 0, L_000002b865bd0910;  1 drivers
v000002b865ba8ae0_0 .net *"_ivl_24", 27 0, L_000002b865bd0b90;  1 drivers
v000002b865ba82c0_0 .net *"_ivl_28", 31 0, L_000002b865bd0d70;  1 drivers
v000002b865ba76e0_0 .net *"_ivl_30", 27 0, L_000002b865bd2d50;  1 drivers
L_000002b865c100d0 .functor BUFT 1, C4<0000000000000000>, C4<0>, C4<0>, C4<0>;
v000002b865ba9120_0 .net *"_ivl_6", 15 0, L_000002b865c100d0;  1 drivers
v000002b865ba7b40_0 .var "acc_cnt", 5 0;
v000002b865ba93a0_0 .var "acc_done", 0 0;
v000002b865ba9260_0 .var/s "acc_im", 31 0;
v000002b865ba8900_0 .var/s "acc_re", 31 0;
v000002b865ba7780_0 .net/s "angle_out", 15 0, v000002b865ba8860_0;  1 drivers
v000002b865ba78c0_0 .var/s "c_r1_im", 15 0;
v000002b865ba8220_0 .var/s "c_r1_re", 15 0;
v000002b865ba7a00_0 .var/s "c_r2_im", 15 0;
v000002b865ba8b80_0 .var/s "c_r2_re", 15 0;
v000002b865ba8fe0_0 .var/s "cfo_eps_hat", 15 0;
v000002b865ba89a0_0 .var "cfo_valid", 0 0;
v000002b865ba84a0_0 .net "clk", 0 0, v000002b865bcc9a0_0;  alias, 1 drivers
v000002b865ba8a40_0 .net/s "cordic_in_im", 15 0, L_000002b865bd0eb0;  1 drivers
v000002b865ba9300_0 .net/s "cordic_in_re", 15 0, L_000002b865bd1e50;  1 drivers
v000002b865ba9440_0 .var/s "d_r1_im", 15 0;
v000002b865ba7c80_0 .var/s "d_r1_re", 15 0;
v000002b865ba8cc0_0 .var/s "d_r2_im", 15 0;
v000002b865ba9080_0 .var/s "d_r2_re", 15 0;
v000002b865ba8f40 .array/s "fifo_r1_im", 63 0, 15 0;
v000002b865ba8680 .array/s "fifo_r1_re", 63 0, 15 0;
v000002b865ba8e00 .array/s "fifo_r2_im", 63 0, 15 0;
v000002b865ba75a0 .array/s "fifo_r2_re", 63 0, 15 0;
v000002b865ba7dc0_0 .net "in_valid", 0 0, v000002b865bd0000_0;  alias, 1 drivers
v000002b865ba7d20_0 .net/s "mrc_im", 16 0, L_000002b865bd0870;  1 drivers
v000002b865ba7f00_0 .net/s "mrc_re", 16 0, L_000002b865bd1bd0;  1 drivers
v000002b865ba8540_0 .net/s "p1_im", 15 0, v000002b865b27030_0;  1 drivers
v000002b865ba7aa0_0 .net/s "p1_re", 15 0, v000002b865b26bd0_0;  1 drivers
v000002b865ba7fa0_0 .net/s "p2_im", 15 0, v000002b865ac5f60_0;  1 drivers
v000002b865ba8040_0 .net/s "p2_re", 15 0, v000002b865ac5c40_0;  1 drivers
v000002b865ba8360_0 .net "rd_ptr", 5 0, L_000002b865b13810;  1 drivers
v000002b865ba8ea0_0 .net "rst_n", 0 0, v000002b865bcf1a0_0;  alias, 1 drivers
v000002b865ba80e0_0 .net/s "rx1_im", 15 0, v000002b865bce0c0_0;  alias, 1 drivers
v000002b865ba8180_0 .net/s "rx1_re", 15 0, v000002b865bce2a0_0;  alias, 1 drivers
v000002b865ba8400_0 .net/s "rx2_im", 15 0, v000002b865bcea20_0;  alias, 1 drivers
v000002b865ba87c0_0 .net/s "rx2_re", 15 0, v000002b865bcca40_0;  alias, 1 drivers
v000002b865baaf50_0 .net "symbol_start", 0 0, v000002b865bd0460_0;  alias, 1 drivers
v000002b865ba9f10_0 .var "valid_d1", 0 0;
v000002b865baa9b0_0 .var "wr_ptr", 5 0;
E_000002b865acd520/0 .event negedge, v000002b865ba8ea0_0;
E_000002b865acd520/1 .event posedge, v000002b865ba84a0_0;
E_000002b865acd520 .event/or E_000002b865acd520/0, E_000002b865acd520/1;
E_000002b865accba0 .event posedge, v000002b865ba84a0_0;
L_000002b865bd09b0 .arith/sub 16, L_000002b865c10088, v000002b865ba78c0_0;
L_000002b865bd0cd0 .arith/sub 16, L_000002b865c100d0, v000002b865ba7a00_0;
L_000002b865bd2530 .extend/s 17, v000002b865b26bd0_0;
L_000002b865bd25d0 .extend/s 17, v000002b865ac5c40_0;
L_000002b865bd1bd0 .arith/sum 17, L_000002b865bd2530, L_000002b865bd25d0;
L_000002b865bd1d10 .extend/s 17, v000002b865b27030_0;
L_000002b865bd11d0 .extend/s 17, v000002b865ac5f60_0;
L_000002b865bd0870 .arith/sum 17, L_000002b865bd1d10, L_000002b865bd11d0;
L_000002b865bd0b90 .part v000002b865ba8900_0, 4, 28;
L_000002b865bd0910 .extend/s 32, L_000002b865bd0b90;
L_000002b865bd1e50 .part L_000002b865bd0910, 0, 16;
L_000002b865bd2d50 .part v000002b865ba9260_0, 4, 28;
L_000002b865bd0d70 .extend/s 32, L_000002b865bd2d50;
L_000002b865bd0eb0 .part L_000002b865bd0d70, 0, 16;
S_000002b865a18220 .scope module, "u_mul1" "complex_mult" 4 96, 5 1 0, S_000002b865a18090;
 .timescale -9 -12;
    .port_info 0 /INPUT 16 "a_re";
    .port_info 1 /INPUT 16 "a_im";
    .port_info 2 /INPUT 16 "b_re";
    .port_info 3 /INPUT 16 "b_im";
    .port_info 4 /OUTPUT 16 "p_re";
    .port_info 5 /OUTPUT 16 "p_im";
P_000002b865b50bd0 .param/l "FRAC" 0 5 3, +C4<00000000000000000000000000001011>;
P_000002b865b50c08 .param/l "MAX_VAL" 1 5 28, +C4<0111111111111111>;
P_000002b865b50c40 .param/l "MIN_VAL" 1 5 29, +C4<1000000000000000>;
P_000002b865b50c78 .param/l "WIDTH" 0 5 2, +C4<00000000000000000000000000010000>;
v000002b865b268b0_0 .net/s *"_ivl_0", 31 0, L_000002b865bcfba0;  1 drivers
v000002b865b263b0_0 .net/s *"_ivl_12", 31 0, L_000002b865bd2170;  1 drivers
v000002b865b25730_0 .net/s *"_ivl_14", 31 0, L_000002b865bd2210;  1 drivers
v000002b865b25eb0_0 .net/s *"_ivl_18", 31 0, L_000002b865bd0c30;  1 drivers
v000002b865b27210_0 .net/s *"_ivl_2", 31 0, L_000002b865bcfd80;  1 drivers
v000002b865b27170_0 .net/s *"_ivl_20", 31 0, L_000002b865bd2710;  1 drivers
v000002b865b25d70_0 .net/s *"_ivl_24", 32 0, L_000002b865bd0e10;  1 drivers
v000002b865b25ff0_0 .net/s *"_ivl_26", 32 0, L_000002b865bd0a50;  1 drivers
v000002b865b26d10_0 .net/s *"_ivl_30", 32 0, L_000002b865bd13b0;  1 drivers
v000002b865b25550_0 .net/s *"_ivl_32", 32 0, L_000002b865bd0f50;  1 drivers
v000002b865b25870_0 .net *"_ivl_38", 21 0, L_000002b865bd1f90;  1 drivers
v000002b865b259b0_0 .net *"_ivl_42", 21 0, L_000002b865bd07d0;  1 drivers
v000002b865b26db0_0 .net/s *"_ivl_6", 31 0, L_000002b865bd01e0;  1 drivers
v000002b865b26590_0 .net/s *"_ivl_8", 31 0, L_000002b865bd1b30;  1 drivers
v000002b865b26770_0 .net/s "a_im", 15 0, v000002b865ba9440_0;  1 drivers
v000002b865b25690_0 .net/s "a_re", 15 0, v000002b865ba7c80_0;  1 drivers
v000002b865b255f0_0 .net/s "ac", 31 0, L_000002b865bd0140;  1 drivers
v000002b865b26950_0 .net/s "ad", 31 0, L_000002b865bd2670;  1 drivers
v000002b865b257d0_0 .net/s "b_im", 15 0, L_000002b865bd09b0;  1 drivers
v000002b865b25c30_0 .net/s "b_re", 15 0, v000002b865ba8220_0;  1 drivers
v000002b865b26ef0_0 .net/s "bc", 31 0, L_000002b865bd2cb0;  1 drivers
v000002b865b25910_0 .net/s "bd", 31 0, L_000002b865bd2030;  1 drivers
v000002b865b25370_0 .net/s "im_long", 32 0, L_000002b865bd1630;  1 drivers
v000002b865b25a50_0 .net/s "im_shifted", 32 0, L_000002b865bd1770;  1 drivers
v000002b865b27030_0 .var/s "p_im", 15 0;
v000002b865b26bd0_0 .var/s "p_re", 15 0;
v000002b865b269f0_0 .net/s "re_long", 32 0, L_000002b865bd20d0;  1 drivers
v000002b865b26130_0 .net/s "re_shifted", 32 0, L_000002b865bd1130;  1 drivers
E_000002b865accc60 .event anyedge, v000002b865b26130_0, v000002b865b25a50_0;
L_000002b865bcfba0 .extend/s 32, v000002b865ba7c80_0;
L_000002b865bcfd80 .extend/s 32, v000002b865ba8220_0;
L_000002b865bd0140 .arith/mult 32, L_000002b865bcfba0, L_000002b865bcfd80;
L_000002b865bd01e0 .extend/s 32, v000002b865ba9440_0;
L_000002b865bd1b30 .extend/s 32, L_000002b865bd09b0;
L_000002b865bd2030 .arith/mult 32, L_000002b865bd01e0, L_000002b865bd1b30;
L_000002b865bd2170 .extend/s 32, v000002b865ba7c80_0;
L_000002b865bd2210 .extend/s 32, L_000002b865bd09b0;
L_000002b865bd2670 .arith/mult 32, L_000002b865bd2170, L_000002b865bd2210;
L_000002b865bd0c30 .extend/s 32, v000002b865ba9440_0;
L_000002b865bd2710 .extend/s 32, v000002b865ba8220_0;
L_000002b865bd2cb0 .arith/mult 32, L_000002b865bd0c30, L_000002b865bd2710;
L_000002b865bd0e10 .extend/s 33, L_000002b865bd0140;
L_000002b865bd0a50 .extend/s 33, L_000002b865bd2030;
L_000002b865bd20d0 .arith/sub 33, L_000002b865bd0e10, L_000002b865bd0a50;
L_000002b865bd13b0 .extend/s 33, L_000002b865bd2670;
L_000002b865bd0f50 .extend/s 33, L_000002b865bd2cb0;
L_000002b865bd1630 .arith/sum 33, L_000002b865bd13b0, L_000002b865bd0f50;
L_000002b865bd1f90 .part L_000002b865bd20d0, 11, 22;
L_000002b865bd1130 .extend/s 33, L_000002b865bd1f90;
L_000002b865bd07d0 .part L_000002b865bd1630, 11, 22;
L_000002b865bd1770 .extend/s 33, L_000002b865bd07d0;
S_000002b86566a4a0 .scope module, "u_mul2" "complex_mult" 4 104, 5 1 0, S_000002b865a18090;
 .timescale -9 -12;
    .port_info 0 /INPUT 16 "a_re";
    .port_info 1 /INPUT 16 "a_im";
    .port_info 2 /INPUT 16 "b_re";
    .port_info 3 /INPUT 16 "b_im";
    .port_info 4 /OUTPUT 16 "p_re";
    .port_info 5 /OUTPUT 16 "p_im";
P_000002b865b1cb20 .param/l "FRAC" 0 5 3, +C4<00000000000000000000000000001011>;
P_000002b865b1cb58 .param/l "MAX_VAL" 1 5 28, +C4<0111111111111111>;
P_000002b865b1cb90 .param/l "MIN_VAL" 1 5 29, +C4<1000000000000000>;
P_000002b865b1cbc8 .param/l "WIDTH" 0 5 2, +C4<00000000000000000000000000010000>;
v000002b865b264f0_0 .net/s *"_ivl_0", 31 0, L_000002b865bd14f0;  1 drivers
v000002b865b26f90_0 .net/s *"_ivl_12", 31 0, L_000002b865bd1310;  1 drivers
v000002b865b25af0_0 .net/s *"_ivl_14", 31 0, L_000002b865bd1c70;  1 drivers
v000002b865b26a90_0 .net/s *"_ivl_18", 31 0, L_000002b865bd2ad0;  1 drivers
v000002b865b25f50_0 .net/s *"_ivl_2", 31 0, L_000002b865bd2850;  1 drivers
v000002b865b270d0_0 .net/s *"_ivl_20", 31 0, L_000002b865bd0af0;  1 drivers
v000002b865b261d0_0 .net/s *"_ivl_24", 32 0, L_000002b865bd18b0;  1 drivers
v000002b865b26270_0 .net/s *"_ivl_26", 32 0, L_000002b865bd23f0;  1 drivers
v000002b865b25b90_0 .net/s *"_ivl_30", 32 0, L_000002b865bd19f0;  1 drivers
v000002b865b26630_0 .net/s *"_ivl_32", 32 0, L_000002b865bd1590;  1 drivers
v000002b865aa3a20_0 .net *"_ivl_38", 21 0, L_000002b865bd28f0;  1 drivers
v000002b865aa2ee0_0 .net *"_ivl_42", 21 0, L_000002b865bd2c10;  1 drivers
v000002b865aa2a80_0 .net/s *"_ivl_6", 31 0, L_000002b865bd0ff0;  1 drivers
v000002b865aa26c0_0 .net/s *"_ivl_8", 31 0, L_000002b865bd1810;  1 drivers
v000002b865aa30c0_0 .net/s "a_im", 15 0, v000002b865ba8cc0_0;  1 drivers
v000002b865aa1fe0_0 .net/s "a_re", 15 0, v000002b865ba9080_0;  1 drivers
v000002b865aa23a0_0 .net/s "ac", 31 0, L_000002b865bd16d0;  1 drivers
v000002b865aa2760_0 .net/s "ad", 31 0, L_000002b865bd2350;  1 drivers
v000002b865aa2800_0 .net/s "b_im", 15 0, L_000002b865bd0cd0;  1 drivers
v000002b865ac74a0_0 .net/s "b_re", 15 0, v000002b865ba8b80_0;  1 drivers
v000002b865ac7220_0 .net/s "bc", 31 0, L_000002b865bd1270;  1 drivers
v000002b865ac6be0_0 .net/s "bd", 31 0, L_000002b865bd22b0;  1 drivers
v000002b865ac7360_0 .net/s "im_long", 32 0, L_000002b865bd2b70;  1 drivers
v000002b865ac5b00_0 .net/s "im_shifted", 32 0, L_000002b865bd1090;  1 drivers
v000002b865ac5f60_0 .var/s "p_im", 15 0;
v000002b865ac5c40_0 .var/s "p_re", 15 0;
v000002b865ac6320_0 .net/s "re_long", 32 0, L_000002b865bd1450;  1 drivers
v000002b865a8c4a0_0 .net/s "re_shifted", 32 0, L_000002b865bd2490;  1 drivers
E_000002b865acce60 .event anyedge, v000002b865a8c4a0_0, v000002b865ac5b00_0;
L_000002b865bd14f0 .extend/s 32, v000002b865ba9080_0;
L_000002b865bd2850 .extend/s 32, v000002b865ba8b80_0;
L_000002b865bd16d0 .arith/mult 32, L_000002b865bd14f0, L_000002b865bd2850;
L_000002b865bd0ff0 .extend/s 32, v000002b865ba8cc0_0;
L_000002b865bd1810 .extend/s 32, L_000002b865bd0cd0;
L_000002b865bd22b0 .arith/mult 32, L_000002b865bd0ff0, L_000002b865bd1810;
L_000002b865bd1310 .extend/s 32, v000002b865ba9080_0;
L_000002b865bd1c70 .extend/s 32, L_000002b865bd0cd0;
L_000002b865bd2350 .arith/mult 32, L_000002b865bd1310, L_000002b865bd1c70;
L_000002b865bd2ad0 .extend/s 32, v000002b865ba8cc0_0;
L_000002b865bd0af0 .extend/s 32, v000002b865ba8b80_0;
L_000002b865bd1270 .arith/mult 32, L_000002b865bd2ad0, L_000002b865bd0af0;
L_000002b865bd18b0 .extend/s 33, L_000002b865bd16d0;
L_000002b865bd23f0 .extend/s 33, L_000002b865bd22b0;
L_000002b865bd1450 .arith/sub 33, L_000002b865bd18b0, L_000002b865bd23f0;
L_000002b865bd19f0 .extend/s 33, L_000002b865bd2350;
L_000002b865bd1590 .extend/s 33, L_000002b865bd1270;
L_000002b865bd2b70 .arith/sum 33, L_000002b865bd19f0, L_000002b865bd1590;
L_000002b865bd28f0 .part L_000002b865bd1450, 11, 22;
L_000002b865bd2490 .extend/s 33, L_000002b865bd28f0;
L_000002b865bd2c10 .part L_000002b865bd2b70, 11, 22;
L_000002b865bd1090 .extend/s 33, L_000002b865bd2c10;
S_000002b86566a630 .scope module, "u_vec" "cordic_vectoring" 4 170, 6 1 0, S_000002b865a18090;
 .timescale -9 -12;
    .port_info 0 /INPUT 16 "x_in";
    .port_info 1 /INPUT 16 "y_in";
    .port_info 2 /OUTPUT 16 "z_out";
P_000002b865acd0e0 .param/l "WIDTH" 0 6 2, +C4<00000000000000000000000000010000>;
L_000002b865c10118 .functor BUFT 1, C4<0000011001001000>, C4<0>, C4<0>, C4<0>;
v000002b865a8c680 .array "atan_table", 11 0;
v000002b865a8c680_0 .net/s v000002b865a8c680 0, 15 0, L_000002b865c10118; 1 drivers
L_000002b865c10160 .functor BUFT 1, C4<0000001110110101>, C4<0>, C4<0>, C4<0>;
v000002b865a8c680_1 .net/s v000002b865a8c680 1, 15 0, L_000002b865c10160; 1 drivers
L_000002b865c101a8 .functor BUFT 1, C4<0000000111110101>, C4<0>, C4<0>, C4<0>;
v000002b865a8c680_2 .net/s v000002b865a8c680 2, 15 0, L_000002b865c101a8; 1 drivers
L_000002b865c101f0 .functor BUFT 1, C4<0000000011111110>, C4<0>, C4<0>, C4<0>;
v000002b865a8c680_3 .net/s v000002b865a8c680 3, 15 0, L_000002b865c101f0; 1 drivers
L_000002b865c10238 .functor BUFT 1, C4<0000000001111111>, C4<0>, C4<0>, C4<0>;
v000002b865a8c680_4 .net/s v000002b865a8c680 4, 15 0, L_000002b865c10238; 1 drivers
L_000002b865c10280 .functor BUFT 1, C4<0000000000111111>, C4<0>, C4<0>, C4<0>;
v000002b865a8c680_5 .net/s v000002b865a8c680 5, 15 0, L_000002b865c10280; 1 drivers
L_000002b865c102c8 .functor BUFT 1, C4<0000000000011111>, C4<0>, C4<0>, C4<0>;
v000002b865a8c680_6 .net/s v000002b865a8c680 6, 15 0, L_000002b865c102c8; 1 drivers
L_000002b865c10310 .functor BUFT 1, C4<0000000000001111>, C4<0>, C4<0>, C4<0>;
v000002b865a8c680_7 .net/s v000002b865a8c680 7, 15 0, L_000002b865c10310; 1 drivers
L_000002b865c10358 .functor BUFT 1, C4<0000000000000111>, C4<0>, C4<0>, C4<0>;
v000002b865a8c680_8 .net/s v000002b865a8c680 8, 15 0, L_000002b865c10358; 1 drivers
L_000002b865c103a0 .functor BUFT 1, C4<0000000000000011>, C4<0>, C4<0>, C4<0>;
v000002b865a8c680_9 .net/s v000002b865a8c680 9, 15 0, L_000002b865c103a0; 1 drivers
L_000002b865c103e8 .functor BUFT 1, C4<0000000000000001>, C4<0>, C4<0>, C4<0>;
v000002b865a8c680_10 .net/s v000002b865a8c680 10, 15 0, L_000002b865c103e8; 1 drivers
L_000002b865c10430 .functor BUFT 1, C4<0000000000000000>, C4<0>, C4<0>, C4<0>;
v000002b865a8c680_11 .net/s v000002b865a8c680 11, 15 0, L_000002b865c10430; 1 drivers
v000002b865a8c720_0 .var/i "i", 31 0;
v000002b865a8c900 .array/s "x", 12 0, 15 0;
v000002b865ba8720_0 .net/s "x_in", 15 0, L_000002b865bd1e50;  alias, 1 drivers
v000002b865ba8c20 .array/s "y", 12 0, 15 0;
v000002b865ba7960_0 .net/s "y_in", 15 0, L_000002b865bd0eb0;  alias, 1 drivers
v000002b865ba8d60 .array/s "z", 12 0, 15 0;
v000002b865ba8860_0 .var/s "z_out", 15 0;
v000002b865ba8c20_0 .array/port v000002b865ba8c20, 0;
v000002b865ba8c20_1 .array/port v000002b865ba8c20, 1;
E_000002b865acc9e0/0 .event anyedge, v000002b865ba8720_0, v000002b865ba7960_0, v000002b865ba8c20_0, v000002b865ba8c20_1;
v000002b865ba8c20_2 .array/port v000002b865ba8c20, 2;
v000002b865ba8c20_3 .array/port v000002b865ba8c20, 3;
v000002b865ba8c20_4 .array/port v000002b865ba8c20, 4;
v000002b865ba8c20_5 .array/port v000002b865ba8c20, 5;
E_000002b865acc9e0/1 .event anyedge, v000002b865ba8c20_2, v000002b865ba8c20_3, v000002b865ba8c20_4, v000002b865ba8c20_5;
v000002b865ba8c20_6 .array/port v000002b865ba8c20, 6;
v000002b865ba8c20_7 .array/port v000002b865ba8c20, 7;
v000002b865ba8c20_8 .array/port v000002b865ba8c20, 8;
v000002b865ba8c20_9 .array/port v000002b865ba8c20, 9;
E_000002b865acc9e0/2 .event anyedge, v000002b865ba8c20_6, v000002b865ba8c20_7, v000002b865ba8c20_8, v000002b865ba8c20_9;
v000002b865ba8c20_10 .array/port v000002b865ba8c20, 10;
v000002b865ba8c20_11 .array/port v000002b865ba8c20, 11;
v000002b865ba8c20_12 .array/port v000002b865ba8c20, 12;
v000002b865a8c900_0 .array/port v000002b865a8c900, 0;
E_000002b865acc9e0/3 .event anyedge, v000002b865ba8c20_10, v000002b865ba8c20_11, v000002b865ba8c20_12, v000002b865a8c900_0;
v000002b865a8c900_1 .array/port v000002b865a8c900, 1;
v000002b865a8c900_2 .array/port v000002b865a8c900, 2;
v000002b865a8c900_3 .array/port v000002b865a8c900, 3;
v000002b865a8c900_4 .array/port v000002b865a8c900, 4;
E_000002b865acc9e0/4 .event anyedge, v000002b865a8c900_1, v000002b865a8c900_2, v000002b865a8c900_3, v000002b865a8c900_4;
v000002b865a8c900_5 .array/port v000002b865a8c900, 5;
v000002b865a8c900_6 .array/port v000002b865a8c900, 6;
v000002b865a8c900_7 .array/port v000002b865a8c900, 7;
v000002b865a8c900_8 .array/port v000002b865a8c900, 8;
E_000002b865acc9e0/5 .event anyedge, v000002b865a8c900_5, v000002b865a8c900_6, v000002b865a8c900_7, v000002b865a8c900_8;
v000002b865a8c900_9 .array/port v000002b865a8c900, 9;
v000002b865a8c900_10 .array/port v000002b865a8c900, 10;
v000002b865a8c900_11 .array/port v000002b865a8c900, 11;
v000002b865a8c900_12 .array/port v000002b865a8c900, 12;
E_000002b865acc9e0/6 .event anyedge, v000002b865a8c900_9, v000002b865a8c900_10, v000002b865a8c900_11, v000002b865a8c900_12;
v000002b865ba8d60_0 .array/port v000002b865ba8d60, 0;
v000002b865ba8d60_1 .array/port v000002b865ba8d60, 1;
v000002b865ba8d60_2 .array/port v000002b865ba8d60, 2;
v000002b865ba8d60_3 .array/port v000002b865ba8d60, 3;
E_000002b865acc9e0/7 .event anyedge, v000002b865ba8d60_0, v000002b865ba8d60_1, v000002b865ba8d60_2, v000002b865ba8d60_3;
v000002b865ba8d60_4 .array/port v000002b865ba8d60, 4;
v000002b865ba8d60_5 .array/port v000002b865ba8d60, 5;
v000002b865ba8d60_6 .array/port v000002b865ba8d60, 6;
v000002b865ba8d60_7 .array/port v000002b865ba8d60, 7;
E_000002b865acc9e0/8 .event anyedge, v000002b865ba8d60_4, v000002b865ba8d60_5, v000002b865ba8d60_6, v000002b865ba8d60_7;
v000002b865ba8d60_8 .array/port v000002b865ba8d60, 8;
v000002b865ba8d60_9 .array/port v000002b865ba8d60, 9;
v000002b865ba8d60_10 .array/port v000002b865ba8d60, 10;
v000002b865ba8d60_11 .array/port v000002b865ba8d60, 11;
E_000002b865acc9e0/9 .event anyedge, v000002b865ba8d60_8, v000002b865ba8d60_9, v000002b865ba8d60_10, v000002b865ba8d60_11;
v000002b865ba8d60_12 .array/port v000002b865ba8d60, 12;
E_000002b865acc9e0/10 .event anyedge, v000002b865ba8d60_12, v000002b865a8c680_0, v000002b865a8c680_1, v000002b865a8c680_2;
E_000002b865acc9e0/11 .event anyedge, v000002b865a8c680_3, v000002b865a8c680_4, v000002b865a8c680_5, v000002b865a8c680_6;
E_000002b865acc9e0/12 .event anyedge, v000002b865a8c680_7, v000002b865a8c680_8, v000002b865a8c680_9, v000002b865a8c680_10;
E_000002b865acc9e0/13 .event anyedge, v000002b865a8c680_11;
E_000002b865acc9e0 .event/or E_000002b865acc9e0/0, E_000002b865acc9e0/1, E_000002b865acc9e0/2, E_000002b865acc9e0/3, E_000002b865acc9e0/4, E_000002b865acc9e0/5, E_000002b865acc9e0/6, E_000002b865acc9e0/7, E_000002b865acc9e0/8, E_000002b865acc9e0/9, E_000002b865acc9e0/10, E_000002b865acc9e0/11, E_000002b865acc9e0/12, E_000002b865acc9e0/13;
S_000002b8656a1fb0 .scope module, "u_cpe" "cpe_tracker" 3 213, 7 1 0, S_000002b865b33340;
 .timescale -9 -12;
    .port_info 0 /INPUT 1 "clk";
    .port_info 1 /INPUT 1 "rst_n";
    .port_info 2 /INPUT 1 "in_valid";
    .port_info 3 /INPUT 16 "X1_re";
    .port_info 4 /INPUT 16 "X1_im";
    .port_info 5 /INPUT 16 "X2_re";
    .port_info 6 /INPUT 16 "X2_im";
    .port_info 7 /OUTPUT 1 "out_valid";
    .port_info 8 /OUTPUT 16 "X1c_re";
    .port_info 9 /OUTPUT 16 "X1c_im";
    .port_info 10 /OUTPUT 16 "X2c_re";
    .port_info 11 /OUTPUT 16 "X2c_im";
    .port_info 12 /OUTPUT 1 "phase_err_valid";
    .port_info 13 /OUTPUT 16 "phase_err";
P_000002b86566a7c0 .param/l "DATA_W" 0 7 2, +C4<00000000000000000000000000010000>;
P_000002b86566a7f8 .param/l "NFFT" 0 7 4, +C4<00000000000000000000000001000000>;
P_000002b86566a830 .param/l "PHASE_W" 0 7 3, +C4<00000000000000000000000000010000>;
P_000002b86566a868 .param/l "QPSK_45" 1 7 41, +C4<0000011001001000>;
P_000002b86566a8a0 .param/l "QPSK_45N" 1 7 43, +C4<1111100110111000>;
P_000002b86566a8d8 .param/l "QPSK_90" 1 7 42, +C4<0000110010010001>;
v000002b865bb05f0_0 .net/s "X1_im", 15 0, v000002b865bc9bb0_0;  alias, 1 drivers
v000002b865bb1590_0 .net/s "X1_re", 15 0, v000002b865bc9390_0;  alias, 1 drivers
v000002b865bb0c30_0 .var/s "X1c_im", 15 0;
v000002b865bb0a50_0 .var/s "X1c_re", 15 0;
v000002b865bb1770_0 .net/s "X2_im", 15 0, v000002b865bc9f70_0;  alias, 1 drivers
v000002b865bb11d0_0 .net/s "X2_re", 15 0, v000002b865bca5b0_0;  alias, 1 drivers
v000002b865bb1090_0 .var/s "X2c_im", 15 0;
v000002b865bb0cd0_0 .var/s "X2c_re", 15 0;
L_000002b865c114c8 .functor BUFT 1, C4<0000000000000000>, C4<0>, C4<0>, C4<0>;
v000002b865bb1ef0_0 .net *"_ivl_6", 15 0, L_000002b865c114c8;  1 drivers
v000002b865bb1a90_0 .net/s "ang1", 15 0, v000002b865baa870_0;  1 drivers
v000002b865bb1bd0_0 .net/s "ang2", 15 0, v000002b865bb13b0_0;  1 drivers
v000002b865bb2350_0 .var/s "avg_err_reg", 15 0;
v000002b865bb0870_0 .var "bank", 0 0;
v000002b865bb1e50_0 .net "clk", 0 0, v000002b865bcc9a0_0;  alias, 1 drivers
v000002b865bb1f90_0 .var "cnt", 5 0;
v000002b865bb20d0_0 .net/s "current_total_diff", 15 0, L_000002b865bd5690;  1 drivers
v000002b865bb22b0_0 .net/s "diff1", 15 0, L_000002b865bd5af0;  1 drivers
v000002b865bb1130_0 .net/s "diff2", 15 0, L_000002b865bd7c10;  1 drivers
v000002b865bb2170_0 .var "first_symbol_done", 0 0;
v000002b865bb1db0_0 .net "in_valid", 0 0, v000002b865bcb910_0;  alias, 1 drivers
v000002b865bb1270_0 .var "out_valid", 0 0;
v000002b865bb19f0_0 .var/s "phase_err", 15 0;
v000002b865bb1450_0 .var "phase_err_valid", 0 0;
v000002b865bb14f0_0 .var/s "r_x1_im", 15 0;
v000002b865bb1630_0 .var/s "r_x1_re", 15 0;
v000002b865bb1810_0 .var/s "r_x2_im", 15 0;
v000002b865bb18b0_0 .var/s "r_x2_re", 15 0;
v000002b865bb0b90 .array/s "ram_x1_im", 127 0, 15 0;
v000002b865bb1950 .array/s "ram_x1_re", 127 0, 15 0;
v000002b865bb0d70 .array/s "ram_x2_im", 127 0, 15 0;
v000002b865bb1c70 .array/s "ram_x2_re", 127 0, 15 0;
v000002b865bb1d10_0 .net/s "rot_angle", 15 0, L_000002b865bd64f0;  1 drivers
v000002b865bb0e10_0 .net "rst_n", 0 0, v000002b865bcf1a0_0;  alias, 1 drivers
v000002b865bb2030_0 .var/s "sum_err", 31 0;
v000002b865bb2210_0 .var/s "sum_next", 31 0;
v000002b865bb2490_0 .var "valid_d1", 0 0;
v000002b865bb0eb0_0 .net/s "x1_fixed_im", 15 0, v000002b865baa690_0;  1 drivers
v000002b865bb0f50_0 .net/s "x1_fixed_re", 15 0, v000002b865ba98d0_0;  1 drivers
v000002b865bb0690_0 .net/s "x2_fixed_im", 15 0, v000002b865baaa50_0;  1 drivers
v000002b865bb0ff0_0 .net/s "x2_fixed_re", 15 0, v000002b865ba9e70_0;  1 drivers
L_000002b865bd5af0 .ufunc/vec4 TD_tb_top_receiver.u_top.u_cpe.calc_diff, 16, v000002b865baa870_0 (v000002b865baa4b0_0) S_000002b865babf20;
L_000002b865bd7c10 .ufunc/vec4 TD_tb_top_receiver.u_top.u_cpe.calc_diff, 16, v000002b865bb13b0_0 (v000002b865baa4b0_0) S_000002b865babf20;
L_000002b865bd5690 .arith/sum 16, L_000002b865bd5af0, L_000002b865bd7c10;
L_000002b865bd64f0 .arith/sub 16, L_000002b865c114c8, v000002b865bb2350_0;
S_000002b865babf20 .scope function.vec4.u16, "calc_diff" "calc_diff" 7 46, 7 46 0, S_000002b8656a1fb0;
 .timescale -9 -12;
; Variable calc_diff is vec4 return value of scope S_000002b865babf20
v000002b865baa4b0_0 .var/s "theta", 15 0;
v000002b865ba9b50_0 .var/s "tmp", 15 0;
TD_tb_top_receiver.u_top.u_cpe.calc_diff ;
    %load/vec4 v000002b865baa4b0_0;
    %subi 1608, 0, 16;
    %store/vec4 v000002b865ba9b50_0, 0, 16;
    %load/vec4 v000002b865ba9b50_0;
    %cmpi/s 1608, 0, 16;
    %flag_or 5, 4; GT is !LE
    %flag_inv 5;
    %jmp/0xz  T_1.2, 5;
    %load/vec4 v000002b865ba9b50_0;
    %subi 3217, 0, 16;
    %store/vec4 v000002b865ba9b50_0, 0, 16;
T_1.2 ;
    %load/vec4 v000002b865ba9b50_0;
    %cmpi/s 1608, 0, 16;
    %flag_or 5, 4; GT is !LE
    %flag_inv 5;
    %jmp/0xz  T_1.4, 5;
    %load/vec4 v000002b865ba9b50_0;
    %subi 3217, 0, 16;
    %store/vec4 v000002b865ba9b50_0, 0, 16;
T_1.4 ;
    %load/vec4 v000002b865ba9b50_0;
    %cmpi/s 1608, 0, 16;
    %flag_or 5, 4; GT is !LE
    %flag_inv 5;
    %jmp/0xz  T_1.6, 5;
    %load/vec4 v000002b865ba9b50_0;
    %subi 3217, 0, 16;
    %store/vec4 v000002b865ba9b50_0, 0, 16;
T_1.6 ;
    %load/vec4 v000002b865ba9b50_0;
    %cmpi/s 63928, 0, 16;
    %jmp/0xz  T_1.8, 5;
    %load/vec4 v000002b865ba9b50_0;
    %addi 3217, 0, 16;
    %store/vec4 v000002b865ba9b50_0, 0, 16;
T_1.8 ;
    %load/vec4 v000002b865ba9b50_0;
    %cmpi/s 63928, 0, 16;
    %jmp/0xz  T_1.10, 5;
    %load/vec4 v000002b865ba9b50_0;
    %addi 3217, 0, 16;
    %store/vec4 v000002b865ba9b50_0, 0, 16;
T_1.10 ;
    %load/vec4 v000002b865ba9b50_0;
    %cmpi/s 63928, 0, 16;
    %jmp/0xz  T_1.12, 5;
    %load/vec4 v000002b865ba9b50_0;
    %addi 3217, 0, 16;
    %store/vec4 v000002b865ba9b50_0, 0, 16;
T_1.12 ;
    %load/vec4 v000002b865ba9b50_0;
    %ret/vec4 0, 0, 16;  Assign to calc_diff (store_vec4_to_lval)
    %end;
S_000002b865bac0b0 .scope module, "u_rot1" "cordic_rotator" 7 173, 8 1 0, S_000002b8656a1fb0;
 .timescale -9 -12;
    .port_info 0 /INPUT 1 "clk";
    .port_info 1 /INPUT 1 "rst_n";
    .port_info 2 /INPUT 16 "x_in";
    .port_info 3 /INPUT 16 "y_in";
    .port_info 4 /INPUT 16 "theta_in";
    .port_info 5 /OUTPUT 16 "x_out";
    .port_info 6 /OUTPUT 16 "y_out";
P_000002b865acd160 .param/l "WIDTH" 0 8 2, +C4<00000000000000000000000000010000>;
v000002b865baaaf0_0 .net/s *"_ivl_37", 31 0, L_000002b865bd5730;  1 drivers
L_000002b865c11870 .functor BUFT 1, C4<00000000000000000000010011011011>, C4<0>, C4<0>, C4<0>;
v000002b865baaeb0_0 .net/2s *"_ivl_39", 31 0, L_000002b865c11870;  1 drivers
v000002b865baa2d0_0 .net/s *"_ivl_44", 31 0, L_000002b865bd7ad0;  1 drivers
L_000002b865c118b8 .functor BUFT 1, C4<00000000000000000000010011011011>, C4<0>, C4<0>, C4<0>;
v000002b865baac30_0 .net/2s *"_ivl_46", 31 0, L_000002b865c118b8;  1 drivers
L_000002b865c11510 .functor BUFT 1, C4<0000011001001000>, C4<0>, C4<0>, C4<0>;
v000002b865baa730 .array "atan_table", 11 0;
v000002b865baa730_0 .net/s v000002b865baa730 0, 15 0, L_000002b865c11510; 1 drivers
L_000002b865c11558 .functor BUFT 1, C4<0000001110110101>, C4<0>, C4<0>, C4<0>;
v000002b865baa730_1 .net/s v000002b865baa730 1, 15 0, L_000002b865c11558; 1 drivers
L_000002b865c115a0 .functor BUFT 1, C4<0000000111110101>, C4<0>, C4<0>, C4<0>;
v000002b865baa730_2 .net/s v000002b865baa730 2, 15 0, L_000002b865c115a0; 1 drivers
L_000002b865c115e8 .functor BUFT 1, C4<0000000011111110>, C4<0>, C4<0>, C4<0>;
v000002b865baa730_3 .net/s v000002b865baa730 3, 15 0, L_000002b865c115e8; 1 drivers
L_000002b865c11630 .functor BUFT 1, C4<0000000001111111>, C4<0>, C4<0>, C4<0>;
v000002b865baa730_4 .net/s v000002b865baa730 4, 15 0, L_000002b865c11630; 1 drivers
L_000002b865c11678 .functor BUFT 1, C4<0000000000111111>, C4<0>, C4<0>, C4<0>;
v000002b865baa730_5 .net/s v000002b865baa730 5, 15 0, L_000002b865c11678; 1 drivers
L_000002b865c116c0 .functor BUFT 1, C4<0000000000011111>, C4<0>, C4<0>, C4<0>;
v000002b865baa730_6 .net/s v000002b865baa730 6, 15 0, L_000002b865c116c0; 1 drivers
L_000002b865c11708 .functor BUFT 1, C4<0000000000001111>, C4<0>, C4<0>, C4<0>;
v000002b865baa730_7 .net/s v000002b865baa730 7, 15 0, L_000002b865c11708; 1 drivers
L_000002b865c11750 .functor BUFT 1, C4<0000000000000111>, C4<0>, C4<0>, C4<0>;
v000002b865baa730_8 .net/s v000002b865baa730 8, 15 0, L_000002b865c11750; 1 drivers
L_000002b865c11798 .functor BUFT 1, C4<0000000000000011>, C4<0>, C4<0>, C4<0>;
v000002b865baa730_9 .net/s v000002b865baa730 9, 15 0, L_000002b865c11798; 1 drivers
L_000002b865c117e0 .functor BUFT 1, C4<0000000000000001>, C4<0>, C4<0>, C4<0>;
v000002b865baa730_10 .net/s v000002b865baa730 10, 15 0, L_000002b865c117e0; 1 drivers
L_000002b865c11828 .functor BUFT 1, C4<0000000000000000>, C4<0>, C4<0>, C4<0>;
v000002b865baa730_11 .net/s v000002b865baa730 11, 15 0, L_000002b865c11828; 1 drivers
o000002b865b55818 .functor BUFZ 1, C4<z>; HiZ drive
v000002b865ba9dd0_0 .net "clk", 0 0, o000002b865b55818;  0 drivers
v000002b865baa0f0_0 .var/i "i", 31 0;
o000002b865b55878 .functor BUFZ 1, C4<z>; HiZ drive
v000002b865bab450_0 .net "rst_n", 0 0, o000002b865b55878;  0 drivers
v000002b865baa7d0_0 .net/s "theta_in", 15 0, L_000002b865bd64f0;  alias, 1 drivers
v000002b865ba9970 .array/s "x", 12 0, 15 0;
v000002b865ba96f0_0 .net/s "x_in", 15 0, v000002b865bb1630_0;  1 drivers
v000002b865ba98d0_0 .var/s "x_out", 15 0;
v000002b865baad70_0 .net/s "x_scaled", 31 0, L_000002b865bd7530;  1 drivers
v000002b865ba9650 .array/s "y", 12 0, 15 0;
v000002b865ba9790_0 .net/s "y_in", 15 0, v000002b865bb14f0_0;  1 drivers
v000002b865baa690_0 .var/s "y_out", 15 0;
v000002b865ba9830_0 .net/s "y_scaled", 31 0, L_000002b865bd72b0;  1 drivers
v000002b865bab3b0 .array/s "z", 12 0, 15 0;
E_000002b865acd2a0 .event anyedge, v000002b865baad70_0, v000002b865ba9830_0;
v000002b865bab3b0_0 .array/port v000002b865bab3b0, 0;
E_000002b865acda20/0 .event anyedge, v000002b865ba96f0_0, v000002b865ba9790_0, v000002b865baa7d0_0, v000002b865bab3b0_0;
v000002b865bab3b0_1 .array/port v000002b865bab3b0, 1;
v000002b865bab3b0_2 .array/port v000002b865bab3b0, 2;
v000002b865bab3b0_3 .array/port v000002b865bab3b0, 3;
v000002b865bab3b0_4 .array/port v000002b865bab3b0, 4;
E_000002b865acda20/1 .event anyedge, v000002b865bab3b0_1, v000002b865bab3b0_2, v000002b865bab3b0_3, v000002b865bab3b0_4;
v000002b865bab3b0_5 .array/port v000002b865bab3b0, 5;
v000002b865bab3b0_6 .array/port v000002b865bab3b0, 6;
v000002b865bab3b0_7 .array/port v000002b865bab3b0, 7;
v000002b865bab3b0_8 .array/port v000002b865bab3b0, 8;
E_000002b865acda20/2 .event anyedge, v000002b865bab3b0_5, v000002b865bab3b0_6, v000002b865bab3b0_7, v000002b865bab3b0_8;
v000002b865bab3b0_9 .array/port v000002b865bab3b0, 9;
v000002b865bab3b0_10 .array/port v000002b865bab3b0, 10;
v000002b865bab3b0_11 .array/port v000002b865bab3b0, 11;
v000002b865bab3b0_12 .array/port v000002b865bab3b0, 12;
E_000002b865acda20/3 .event anyedge, v000002b865bab3b0_9, v000002b865bab3b0_10, v000002b865bab3b0_11, v000002b865bab3b0_12;
v000002b865ba9970_0 .array/port v000002b865ba9970, 0;
v000002b865ba9970_1 .array/port v000002b865ba9970, 1;
v000002b865ba9970_2 .array/port v000002b865ba9970, 2;
v000002b865ba9970_3 .array/port v000002b865ba9970, 3;
E_000002b865acda20/4 .event anyedge, v000002b865ba9970_0, v000002b865ba9970_1, v000002b865ba9970_2, v000002b865ba9970_3;
v000002b865ba9970_4 .array/port v000002b865ba9970, 4;
v000002b865ba9970_5 .array/port v000002b865ba9970, 5;
v000002b865ba9970_6 .array/port v000002b865ba9970, 6;
v000002b865ba9970_7 .array/port v000002b865ba9970, 7;
E_000002b865acda20/5 .event anyedge, v000002b865ba9970_4, v000002b865ba9970_5, v000002b865ba9970_6, v000002b865ba9970_7;
v000002b865ba9970_8 .array/port v000002b865ba9970, 8;
v000002b865ba9970_9 .array/port v000002b865ba9970, 9;
v000002b865ba9970_10 .array/port v000002b865ba9970, 10;
v000002b865ba9970_11 .array/port v000002b865ba9970, 11;
E_000002b865acda20/6 .event anyedge, v000002b865ba9970_8, v000002b865ba9970_9, v000002b865ba9970_10, v000002b865ba9970_11;
v000002b865ba9970_12 .array/port v000002b865ba9970, 12;
v000002b865ba9650_0 .array/port v000002b865ba9650, 0;
v000002b865ba9650_1 .array/port v000002b865ba9650, 1;
v000002b865ba9650_2 .array/port v000002b865ba9650, 2;
E_000002b865acda20/7 .event anyedge, v000002b865ba9970_12, v000002b865ba9650_0, v000002b865ba9650_1, v000002b865ba9650_2;
v000002b865ba9650_3 .array/port v000002b865ba9650, 3;
v000002b865ba9650_4 .array/port v000002b865ba9650, 4;
v000002b865ba9650_5 .array/port v000002b865ba9650, 5;
v000002b865ba9650_6 .array/port v000002b865ba9650, 6;
E_000002b865acda20/8 .event anyedge, v000002b865ba9650_3, v000002b865ba9650_4, v000002b865ba9650_5, v000002b865ba9650_6;
v000002b865ba9650_7 .array/port v000002b865ba9650, 7;
v000002b865ba9650_8 .array/port v000002b865ba9650, 8;
v000002b865ba9650_9 .array/port v000002b865ba9650, 9;
v000002b865ba9650_10 .array/port v000002b865ba9650, 10;
E_000002b865acda20/9 .event anyedge, v000002b865ba9650_7, v000002b865ba9650_8, v000002b865ba9650_9, v000002b865ba9650_10;
v000002b865ba9650_11 .array/port v000002b865ba9650, 11;
v000002b865ba9650_12 .array/port v000002b865ba9650, 12;
E_000002b865acda20/10 .event anyedge, v000002b865ba9650_11, v000002b865ba9650_12, v000002b865baa730_0, v000002b865baa730_1;
E_000002b865acda20/11 .event anyedge, v000002b865baa730_2, v000002b865baa730_3, v000002b865baa730_4, v000002b865baa730_5;
E_000002b865acda20/12 .event anyedge, v000002b865baa730_6, v000002b865baa730_7, v000002b865baa730_8, v000002b865baa730_9;
E_000002b865acda20/13 .event anyedge, v000002b865baa730_10, v000002b865baa730_11;
E_000002b865acda20 .event/or E_000002b865acda20/0, E_000002b865acda20/1, E_000002b865acda20/2, E_000002b865acda20/3, E_000002b865acda20/4, E_000002b865acda20/5, E_000002b865acda20/6, E_000002b865acda20/7, E_000002b865acda20/8, E_000002b865acda20/9, E_000002b865acda20/10, E_000002b865acda20/11, E_000002b865acda20/12, E_000002b865acda20/13;
L_000002b865bd5730 .extend/s 32, v000002b865ba9970_12;
L_000002b865bd7530 .arith/mult 32, L_000002b865bd5730, L_000002b865c11870;
L_000002b865bd7ad0 .extend/s 32, v000002b865ba9650_12;
L_000002b865bd72b0 .arith/mult 32, L_000002b865bd7ad0, L_000002b865c118b8;
S_000002b865bac240 .scope module, "u_rot2" "cordic_rotator" 7 178, 8 1 0, S_000002b8656a1fb0;
 .timescale -9 -12;
    .port_info 0 /INPUT 1 "clk";
    .port_info 1 /INPUT 1 "rst_n";
    .port_info 2 /INPUT 16 "x_in";
    .port_info 3 /INPUT 16 "y_in";
    .port_info 4 /INPUT 16 "theta_in";
    .port_info 5 /OUTPUT 16 "x_out";
    .port_info 6 /OUTPUT 16 "y_out";
P_000002b865acd1e0 .param/l "WIDTH" 0 8 2, +C4<00000000000000000000000000010000>;
v000002b865ba9c90_0 .net/s *"_ivl_37", 31 0, L_000002b865bd6c70;  1 drivers
L_000002b865c11c60 .functor BUFT 1, C4<00000000000000000000010011011011>, C4<0>, C4<0>, C4<0>;
v000002b865ba9d30_0 .net/2s *"_ivl_39", 31 0, L_000002b865c11c60;  1 drivers
v000002b865bab090_0 .net/s *"_ivl_44", 31 0, L_000002b865bd5b90;  1 drivers
L_000002b865c11ca8 .functor BUFT 1, C4<00000000000000000000010011011011>, C4<0>, C4<0>, C4<0>;
v000002b865ba9a10_0 .net/2s *"_ivl_46", 31 0, L_000002b865c11ca8;  1 drivers
L_000002b865c11900 .functor BUFT 1, C4<0000011001001000>, C4<0>, C4<0>, C4<0>;
v000002b865baae10 .array "atan_table", 11 0;
v000002b865baae10_0 .net/s v000002b865baae10 0, 15 0, L_000002b865c11900; 1 drivers
L_000002b865c11948 .functor BUFT 1, C4<0000001110110101>, C4<0>, C4<0>, C4<0>;
v000002b865baae10_1 .net/s v000002b865baae10 1, 15 0, L_000002b865c11948; 1 drivers
L_000002b865c11990 .functor BUFT 1, C4<0000000111110101>, C4<0>, C4<0>, C4<0>;
v000002b865baae10_2 .net/s v000002b865baae10 2, 15 0, L_000002b865c11990; 1 drivers
L_000002b865c119d8 .functor BUFT 1, C4<0000000011111110>, C4<0>, C4<0>, C4<0>;
v000002b865baae10_3 .net/s v000002b865baae10 3, 15 0, L_000002b865c119d8; 1 drivers
L_000002b865c11a20 .functor BUFT 1, C4<0000000001111111>, C4<0>, C4<0>, C4<0>;
v000002b865baae10_4 .net/s v000002b865baae10 4, 15 0, L_000002b865c11a20; 1 drivers
L_000002b865c11a68 .functor BUFT 1, C4<0000000000111111>, C4<0>, C4<0>, C4<0>;
v000002b865baae10_5 .net/s v000002b865baae10 5, 15 0, L_000002b865c11a68; 1 drivers
L_000002b865c11ab0 .functor BUFT 1, C4<0000000000011111>, C4<0>, C4<0>, C4<0>;
v000002b865baae10_6 .net/s v000002b865baae10 6, 15 0, L_000002b865c11ab0; 1 drivers
L_000002b865c11af8 .functor BUFT 1, C4<0000000000001111>, C4<0>, C4<0>, C4<0>;
v000002b865baae10_7 .net/s v000002b865baae10 7, 15 0, L_000002b865c11af8; 1 drivers
L_000002b865c11b40 .functor BUFT 1, C4<0000000000000111>, C4<0>, C4<0>, C4<0>;
v000002b865baae10_8 .net/s v000002b865baae10 8, 15 0, L_000002b865c11b40; 1 drivers
L_000002b865c11b88 .functor BUFT 1, C4<0000000000000011>, C4<0>, C4<0>, C4<0>;
v000002b865baae10_9 .net/s v000002b865baae10 9, 15 0, L_000002b865c11b88; 1 drivers
L_000002b865c11bd0 .functor BUFT 1, C4<0000000000000001>, C4<0>, C4<0>, C4<0>;
v000002b865baae10_10 .net/s v000002b865baae10 10, 15 0, L_000002b865c11bd0; 1 drivers
L_000002b865c11c18 .functor BUFT 1, C4<0000000000000000>, C4<0>, C4<0>, C4<0>;
v000002b865baae10_11 .net/s v000002b865baae10 11, 15 0, L_000002b865c11c18; 1 drivers
o000002b865b56598 .functor BUFZ 1, C4<z>; HiZ drive
v000002b865ba9ab0_0 .net "clk", 0 0, o000002b865b56598;  0 drivers
v000002b865bab270_0 .var/i "i", 31 0;
o000002b865b565f8 .functor BUFZ 1, C4<z>; HiZ drive
v000002b865bab1d0_0 .net "rst_n", 0 0, o000002b865b565f8;  0 drivers
v000002b865bab310_0 .net/s "theta_in", 15 0, L_000002b865bd64f0;  alias, 1 drivers
v000002b865baa190 .array/s "x", 12 0, 15 0;
v000002b865baa550_0 .net/s "x_in", 15 0, v000002b865bb18b0_0;  1 drivers
v000002b865ba9e70_0 .var/s "x_out", 15 0;
v000002b865baaff0_0 .net/s "x_scaled", 31 0, L_000002b865bd6d10;  1 drivers
v000002b865ba9fb0 .array/s "y", 12 0, 15 0;
v000002b865baa5f0_0 .net/s "y_in", 15 0, v000002b865bb1810_0;  1 drivers
v000002b865baaa50_0 .var/s "y_out", 15 0;
v000002b865baa050_0 .net/s "y_scaled", 31 0, L_000002b865bd7df0;  1 drivers
v000002b865baa230 .array/s "z", 12 0, 15 0;
E_000002b865acdea0 .event anyedge, v000002b865baaff0_0, v000002b865baa050_0;
v000002b865baa230_0 .array/port v000002b865baa230, 0;
E_000002b865ace2a0/0 .event anyedge, v000002b865baa550_0, v000002b865baa5f0_0, v000002b865baa7d0_0, v000002b865baa230_0;
v000002b865baa230_1 .array/port v000002b865baa230, 1;
v000002b865baa230_2 .array/port v000002b865baa230, 2;
v000002b865baa230_3 .array/port v000002b865baa230, 3;
v000002b865baa230_4 .array/port v000002b865baa230, 4;
E_000002b865ace2a0/1 .event anyedge, v000002b865baa230_1, v000002b865baa230_2, v000002b865baa230_3, v000002b865baa230_4;
v000002b865baa230_5 .array/port v000002b865baa230, 5;
v000002b865baa230_6 .array/port v000002b865baa230, 6;
v000002b865baa230_7 .array/port v000002b865baa230, 7;
v000002b865baa230_8 .array/port v000002b865baa230, 8;
E_000002b865ace2a0/2 .event anyedge, v000002b865baa230_5, v000002b865baa230_6, v000002b865baa230_7, v000002b865baa230_8;
v000002b865baa230_9 .array/port v000002b865baa230, 9;
v000002b865baa230_10 .array/port v000002b865baa230, 10;
v000002b865baa230_11 .array/port v000002b865baa230, 11;
v000002b865baa230_12 .array/port v000002b865baa230, 12;
E_000002b865ace2a0/3 .event anyedge, v000002b865baa230_9, v000002b865baa230_10, v000002b865baa230_11, v000002b865baa230_12;
v000002b865baa190_0 .array/port v000002b865baa190, 0;
v000002b865baa190_1 .array/port v000002b865baa190, 1;
v000002b865baa190_2 .array/port v000002b865baa190, 2;
v000002b865baa190_3 .array/port v000002b865baa190, 3;
E_000002b865ace2a0/4 .event anyedge, v000002b865baa190_0, v000002b865baa190_1, v000002b865baa190_2, v000002b865baa190_3;
v000002b865baa190_4 .array/port v000002b865baa190, 4;
v000002b865baa190_5 .array/port v000002b865baa190, 5;
v000002b865baa190_6 .array/port v000002b865baa190, 6;
v000002b865baa190_7 .array/port v000002b865baa190, 7;
E_000002b865ace2a0/5 .event anyedge, v000002b865baa190_4, v000002b865baa190_5, v000002b865baa190_6, v000002b865baa190_7;
v000002b865baa190_8 .array/port v000002b865baa190, 8;
v000002b865baa190_9 .array/port v000002b865baa190, 9;
v000002b865baa190_10 .array/port v000002b865baa190, 10;
v000002b865baa190_11 .array/port v000002b865baa190, 11;
E_000002b865ace2a0/6 .event anyedge, v000002b865baa190_8, v000002b865baa190_9, v000002b865baa190_10, v000002b865baa190_11;
v000002b865baa190_12 .array/port v000002b865baa190, 12;
v000002b865ba9fb0_0 .array/port v000002b865ba9fb0, 0;
v000002b865ba9fb0_1 .array/port v000002b865ba9fb0, 1;
v000002b865ba9fb0_2 .array/port v000002b865ba9fb0, 2;
E_000002b865ace2a0/7 .event anyedge, v000002b865baa190_12, v000002b865ba9fb0_0, v000002b865ba9fb0_1, v000002b865ba9fb0_2;
v000002b865ba9fb0_3 .array/port v000002b865ba9fb0, 3;
v000002b865ba9fb0_4 .array/port v000002b865ba9fb0, 4;
v000002b865ba9fb0_5 .array/port v000002b865ba9fb0, 5;
v000002b865ba9fb0_6 .array/port v000002b865ba9fb0, 6;
E_000002b865ace2a0/8 .event anyedge, v000002b865ba9fb0_3, v000002b865ba9fb0_4, v000002b865ba9fb0_5, v000002b865ba9fb0_6;
v000002b865ba9fb0_7 .array/port v000002b865ba9fb0, 7;
v000002b865ba9fb0_8 .array/port v000002b865ba9fb0, 8;
v000002b865ba9fb0_9 .array/port v000002b865ba9fb0, 9;
v000002b865ba9fb0_10 .array/port v000002b865ba9fb0, 10;
E_000002b865ace2a0/9 .event anyedge, v000002b865ba9fb0_7, v000002b865ba9fb0_8, v000002b865ba9fb0_9, v000002b865ba9fb0_10;
v000002b865ba9fb0_11 .array/port v000002b865ba9fb0, 11;
v000002b865ba9fb0_12 .array/port v000002b865ba9fb0, 12;
E_000002b865ace2a0/10 .event anyedge, v000002b865ba9fb0_11, v000002b865ba9fb0_12, v000002b865baae10_0, v000002b865baae10_1;
E_000002b865ace2a0/11 .event anyedge, v000002b865baae10_2, v000002b865baae10_3, v000002b865baae10_4, v000002b865baae10_5;
E_000002b865ace2a0/12 .event anyedge, v000002b865baae10_6, v000002b865baae10_7, v000002b865baae10_8, v000002b865baae10_9;
E_000002b865ace2a0/13 .event anyedge, v000002b865baae10_10, v000002b865baae10_11;
E_000002b865ace2a0 .event/or E_000002b865ace2a0/0, E_000002b865ace2a0/1, E_000002b865ace2a0/2, E_000002b865ace2a0/3, E_000002b865ace2a0/4, E_000002b865ace2a0/5, E_000002b865ace2a0/6, E_000002b865ace2a0/7, E_000002b865ace2a0/8, E_000002b865ace2a0/9, E_000002b865ace2a0/10, E_000002b865ace2a0/11, E_000002b865ace2a0/12, E_000002b865ace2a0/13;
L_000002b865bd6c70 .extend/s 32, v000002b865baa190_12;
L_000002b865bd6d10 .arith/mult 32, L_000002b865bd6c70, L_000002b865c11c60;
L_000002b865bd5b90 .extend/s 32, v000002b865ba9fb0_12;
L_000002b865bd7df0 .arith/mult 32, L_000002b865bd5b90, L_000002b865c11ca8;
S_000002b865bac3d0 .scope module, "u_vec1" "cordic_vectoring" 7 29, 6 1 0, S_000002b8656a1fb0;
 .timescale -9 -12;
    .port_info 0 /INPUT 16 "x_in";
    .port_info 1 /INPUT 16 "y_in";
    .port_info 2 /OUTPUT 16 "z_out";
P_000002b865ace7e0 .param/l "WIDTH" 0 6 2, +C4<00000000000000000000000000010000>;
L_000002b865c10e08 .functor BUFT 1, C4<0000011001001000>, C4<0>, C4<0>, C4<0>;
v000002b865baab90 .array "atan_table", 11 0;
v000002b865baab90_0 .net/s v000002b865baab90 0, 15 0, L_000002b865c10e08; 1 drivers
L_000002b865c10e50 .functor BUFT 1, C4<0000001110110101>, C4<0>, C4<0>, C4<0>;
v000002b865baab90_1 .net/s v000002b865baab90 1, 15 0, L_000002b865c10e50; 1 drivers
L_000002b865c10e98 .functor BUFT 1, C4<0000000111110101>, C4<0>, C4<0>, C4<0>;
v000002b865baab90_2 .net/s v000002b865baab90 2, 15 0, L_000002b865c10e98; 1 drivers
L_000002b865c10ee0 .functor BUFT 1, C4<0000000011111110>, C4<0>, C4<0>, C4<0>;
v000002b865baab90_3 .net/s v000002b865baab90 3, 15 0, L_000002b865c10ee0; 1 drivers
L_000002b865c10f28 .functor BUFT 1, C4<0000000001111111>, C4<0>, C4<0>, C4<0>;
v000002b865baab90_4 .net/s v000002b865baab90 4, 15 0, L_000002b865c10f28; 1 drivers
L_000002b865c10f70 .functor BUFT 1, C4<0000000000111111>, C4<0>, C4<0>, C4<0>;
v000002b865baab90_5 .net/s v000002b865baab90 5, 15 0, L_000002b865c10f70; 1 drivers
L_000002b865c10fb8 .functor BUFT 1, C4<0000000000011111>, C4<0>, C4<0>, C4<0>;
v000002b865baab90_6 .net/s v000002b865baab90 6, 15 0, L_000002b865c10fb8; 1 drivers
L_000002b865c11000 .functor BUFT 1, C4<0000000000001111>, C4<0>, C4<0>, C4<0>;
v000002b865baab90_7 .net/s v000002b865baab90 7, 15 0, L_000002b865c11000; 1 drivers
L_000002b865c11048 .functor BUFT 1, C4<0000000000000111>, C4<0>, C4<0>, C4<0>;
v000002b865baab90_8 .net/s v000002b865baab90 8, 15 0, L_000002b865c11048; 1 drivers
L_000002b865c11090 .functor BUFT 1, C4<0000000000000011>, C4<0>, C4<0>, C4<0>;
v000002b865baab90_9 .net/s v000002b865baab90 9, 15 0, L_000002b865c11090; 1 drivers
L_000002b865c110d8 .functor BUFT 1, C4<0000000000000001>, C4<0>, C4<0>, C4<0>;
v000002b865baab90_10 .net/s v000002b865baab90 10, 15 0, L_000002b865c110d8; 1 drivers
L_000002b865c11120 .functor BUFT 1, C4<0000000000000000>, C4<0>, C4<0>, C4<0>;
v000002b865baab90_11 .net/s v000002b865baab90 11, 15 0, L_000002b865c11120; 1 drivers
v000002b865baacd0_0 .var/i "i", 31 0;
v000002b865baa910 .array/s "x", 12 0, 15 0;
v000002b865baa370_0 .net/s "x_in", 15 0, v000002b865bc9390_0;  alias, 1 drivers
v000002b865ba95b0 .array/s "y", 12 0, 15 0;
v000002b865bab130_0 .net/s "y_in", 15 0, v000002b865bc9bb0_0;  alias, 1 drivers
v000002b865baa410 .array/s "z", 12 0, 15 0;
v000002b865baa870_0 .var/s "z_out", 15 0;
v000002b865ba95b0_0 .array/port v000002b865ba95b0, 0;
v000002b865ba95b0_1 .array/port v000002b865ba95b0, 1;
E_000002b865ace060/0 .event anyedge, v000002b865baa370_0, v000002b865bab130_0, v000002b865ba95b0_0, v000002b865ba95b0_1;
v000002b865ba95b0_2 .array/port v000002b865ba95b0, 2;
v000002b865ba95b0_3 .array/port v000002b865ba95b0, 3;
v000002b865ba95b0_4 .array/port v000002b865ba95b0, 4;
v000002b865ba95b0_5 .array/port v000002b865ba95b0, 5;
E_000002b865ace060/1 .event anyedge, v000002b865ba95b0_2, v000002b865ba95b0_3, v000002b865ba95b0_4, v000002b865ba95b0_5;
v000002b865ba95b0_6 .array/port v000002b865ba95b0, 6;
v000002b865ba95b0_7 .array/port v000002b865ba95b0, 7;
v000002b865ba95b0_8 .array/port v000002b865ba95b0, 8;
v000002b865ba95b0_9 .array/port v000002b865ba95b0, 9;
E_000002b865ace060/2 .event anyedge, v000002b865ba95b0_6, v000002b865ba95b0_7, v000002b865ba95b0_8, v000002b865ba95b0_9;
v000002b865ba95b0_10 .array/port v000002b865ba95b0, 10;
v000002b865ba95b0_11 .array/port v000002b865ba95b0, 11;
v000002b865ba95b0_12 .array/port v000002b865ba95b0, 12;
v000002b865baa910_0 .array/port v000002b865baa910, 0;
E_000002b865ace060/3 .event anyedge, v000002b865ba95b0_10, v000002b865ba95b0_11, v000002b865ba95b0_12, v000002b865baa910_0;
v000002b865baa910_1 .array/port v000002b865baa910, 1;
v000002b865baa910_2 .array/port v000002b865baa910, 2;
v000002b865baa910_3 .array/port v000002b865baa910, 3;
v000002b865baa910_4 .array/port v000002b865baa910, 4;
E_000002b865ace060/4 .event anyedge, v000002b865baa910_1, v000002b865baa910_2, v000002b865baa910_3, v000002b865baa910_4;
v000002b865baa910_5 .array/port v000002b865baa910, 5;
v000002b865baa910_6 .array/port v000002b865baa910, 6;
v000002b865baa910_7 .array/port v000002b865baa910, 7;
v000002b865baa910_8 .array/port v000002b865baa910, 8;
E_000002b865ace060/5 .event anyedge, v000002b865baa910_5, v000002b865baa910_6, v000002b865baa910_7, v000002b865baa910_8;
v000002b865baa910_9 .array/port v000002b865baa910, 9;
v000002b865baa910_10 .array/port v000002b865baa910, 10;
v000002b865baa910_11 .array/port v000002b865baa910, 11;
v000002b865baa910_12 .array/port v000002b865baa910, 12;
E_000002b865ace060/6 .event anyedge, v000002b865baa910_9, v000002b865baa910_10, v000002b865baa910_11, v000002b865baa910_12;
v000002b865baa410_0 .array/port v000002b865baa410, 0;
v000002b865baa410_1 .array/port v000002b865baa410, 1;
v000002b865baa410_2 .array/port v000002b865baa410, 2;
v000002b865baa410_3 .array/port v000002b865baa410, 3;
E_000002b865ace060/7 .event anyedge, v000002b865baa410_0, v000002b865baa410_1, v000002b865baa410_2, v000002b865baa410_3;
v000002b865baa410_4 .array/port v000002b865baa410, 4;
v000002b865baa410_5 .array/port v000002b865baa410, 5;
v000002b865baa410_6 .array/port v000002b865baa410, 6;
v000002b865baa410_7 .array/port v000002b865baa410, 7;
E_000002b865ace060/8 .event anyedge, v000002b865baa410_4, v000002b865baa410_5, v000002b865baa410_6, v000002b865baa410_7;
v000002b865baa410_8 .array/port v000002b865baa410, 8;
v000002b865baa410_9 .array/port v000002b865baa410, 9;
v000002b865baa410_10 .array/port v000002b865baa410, 10;
v000002b865baa410_11 .array/port v000002b865baa410, 11;
E_000002b865ace060/9 .event anyedge, v000002b865baa410_8, v000002b865baa410_9, v000002b865baa410_10, v000002b865baa410_11;
v000002b865baa410_12 .array/port v000002b865baa410, 12;
E_000002b865ace060/10 .event anyedge, v000002b865baa410_12, v000002b865baab90_0, v000002b865baab90_1, v000002b865baab90_2;
E_000002b865ace060/11 .event anyedge, v000002b865baab90_3, v000002b865baab90_4, v000002b865baab90_5, v000002b865baab90_6;
E_000002b865ace060/12 .event anyedge, v000002b865baab90_7, v000002b865baab90_8, v000002b865baab90_9, v000002b865baab90_10;
E_000002b865ace060/13 .event anyedge, v000002b865baab90_11;
E_000002b865ace060 .event/or E_000002b865ace060/0, E_000002b865ace060/1, E_000002b865ace060/2, E_000002b865ace060/3, E_000002b865ace060/4, E_000002b865ace060/5, E_000002b865ace060/6, E_000002b865ace060/7, E_000002b865ace060/8, E_000002b865ace060/9, E_000002b865ace060/10, E_000002b865ace060/11, E_000002b865ace060/12, E_000002b865ace060/13;
S_000002b865bab5c0 .scope module, "u_vec2" "cordic_vectoring" 7 32, 6 1 0, S_000002b8656a1fb0;
 .timescale -9 -12;
    .port_info 0 /INPUT 16 "x_in";
    .port_info 1 /INPUT 16 "y_in";
    .port_info 2 /OUTPUT 16 "z_out";
P_000002b865ace0e0 .param/l "WIDTH" 0 6 2, +C4<00000000000000000000000000010000>;
L_000002b865c11168 .functor BUFT 1, C4<0000011001001000>, C4<0>, C4<0>, C4<0>;
v000002b865bb16d0 .array "atan_table", 11 0;
v000002b865bb16d0_0 .net/s v000002b865bb16d0 0, 15 0, L_000002b865c11168; 1 drivers
L_000002b865c111b0 .functor BUFT 1, C4<0000001110110101>, C4<0>, C4<0>, C4<0>;
v000002b865bb16d0_1 .net/s v000002b865bb16d0 1, 15 0, L_000002b865c111b0; 1 drivers
L_000002b865c111f8 .functor BUFT 1, C4<0000000111110101>, C4<0>, C4<0>, C4<0>;
v000002b865bb16d0_2 .net/s v000002b865bb16d0 2, 15 0, L_000002b865c111f8; 1 drivers
L_000002b865c11240 .functor BUFT 1, C4<0000000011111110>, C4<0>, C4<0>, C4<0>;
v000002b865bb16d0_3 .net/s v000002b865bb16d0 3, 15 0, L_000002b865c11240; 1 drivers
L_000002b865c11288 .functor BUFT 1, C4<0000000001111111>, C4<0>, C4<0>, C4<0>;
v000002b865bb16d0_4 .net/s v000002b865bb16d0 4, 15 0, L_000002b865c11288; 1 drivers
L_000002b865c112d0 .functor BUFT 1, C4<0000000000111111>, C4<0>, C4<0>, C4<0>;
v000002b865bb16d0_5 .net/s v000002b865bb16d0 5, 15 0, L_000002b865c112d0; 1 drivers
L_000002b865c11318 .functor BUFT 1, C4<0000000000011111>, C4<0>, C4<0>, C4<0>;
v000002b865bb16d0_6 .net/s v000002b865bb16d0 6, 15 0, L_000002b865c11318; 1 drivers
L_000002b865c11360 .functor BUFT 1, C4<0000000000001111>, C4<0>, C4<0>, C4<0>;
v000002b865bb16d0_7 .net/s v000002b865bb16d0 7, 15 0, L_000002b865c11360; 1 drivers
L_000002b865c113a8 .functor BUFT 1, C4<0000000000000111>, C4<0>, C4<0>, C4<0>;
v000002b865bb16d0_8 .net/s v000002b865bb16d0 8, 15 0, L_000002b865c113a8; 1 drivers
L_000002b865c113f0 .functor BUFT 1, C4<0000000000000011>, C4<0>, C4<0>, C4<0>;
v000002b865bb16d0_9 .net/s v000002b865bb16d0 9, 15 0, L_000002b865c113f0; 1 drivers
L_000002b865c11438 .functor BUFT 1, C4<0000000000000001>, C4<0>, C4<0>, C4<0>;
v000002b865bb16d0_10 .net/s v000002b865bb16d0 10, 15 0, L_000002b865c11438; 1 drivers
L_000002b865c11480 .functor BUFT 1, C4<0000000000000000>, C4<0>, C4<0>, C4<0>;
v000002b865bb16d0_11 .net/s v000002b865bb16d0 11, 15 0, L_000002b865c11480; 1 drivers
v000002b865bb0af0_0 .var/i "i", 31 0;
v000002b865bb07d0 .array/s "x", 12 0, 15 0;
v000002b865bb1b30_0 .net/s "x_in", 15 0, v000002b865bca5b0_0;  alias, 1 drivers
v000002b865bb1310 .array/s "y", 12 0, 15 0;
v000002b865bb23f0_0 .net/s "y_in", 15 0, v000002b865bc9f70_0;  alias, 1 drivers
v000002b865bb09b0 .array/s "z", 12 0, 15 0;
v000002b865bb13b0_0 .var/s "z_out", 15 0;
v000002b865bb1310_0 .array/port v000002b865bb1310, 0;
v000002b865bb1310_1 .array/port v000002b865bb1310, 1;
E_000002b865acdba0/0 .event anyedge, v000002b865bb1b30_0, v000002b865bb23f0_0, v000002b865bb1310_0, v000002b865bb1310_1;
v000002b865bb1310_2 .array/port v000002b865bb1310, 2;
v000002b865bb1310_3 .array/port v000002b865bb1310, 3;
v000002b865bb1310_4 .array/port v000002b865bb1310, 4;
v000002b865bb1310_5 .array/port v000002b865bb1310, 5;
E_000002b865acdba0/1 .event anyedge, v000002b865bb1310_2, v000002b865bb1310_3, v000002b865bb1310_4, v000002b865bb1310_5;
v000002b865bb1310_6 .array/port v000002b865bb1310, 6;
v000002b865bb1310_7 .array/port v000002b865bb1310, 7;
v000002b865bb1310_8 .array/port v000002b865bb1310, 8;
v000002b865bb1310_9 .array/port v000002b865bb1310, 9;
E_000002b865acdba0/2 .event anyedge, v000002b865bb1310_6, v000002b865bb1310_7, v000002b865bb1310_8, v000002b865bb1310_9;
v000002b865bb1310_10 .array/port v000002b865bb1310, 10;
v000002b865bb1310_11 .array/port v000002b865bb1310, 11;
v000002b865bb1310_12 .array/port v000002b865bb1310, 12;
v000002b865bb07d0_0 .array/port v000002b865bb07d0, 0;
E_000002b865acdba0/3 .event anyedge, v000002b865bb1310_10, v000002b865bb1310_11, v000002b865bb1310_12, v000002b865bb07d0_0;
v000002b865bb07d0_1 .array/port v000002b865bb07d0, 1;
v000002b865bb07d0_2 .array/port v000002b865bb07d0, 2;
v000002b865bb07d0_3 .array/port v000002b865bb07d0, 3;
v000002b865bb07d0_4 .array/port v000002b865bb07d0, 4;
E_000002b865acdba0/4 .event anyedge, v000002b865bb07d0_1, v000002b865bb07d0_2, v000002b865bb07d0_3, v000002b865bb07d0_4;
v000002b865bb07d0_5 .array/port v000002b865bb07d0, 5;
v000002b865bb07d0_6 .array/port v000002b865bb07d0, 6;
v000002b865bb07d0_7 .array/port v000002b865bb07d0, 7;
v000002b865bb07d0_8 .array/port v000002b865bb07d0, 8;
E_000002b865acdba0/5 .event anyedge, v000002b865bb07d0_5, v000002b865bb07d0_6, v000002b865bb07d0_7, v000002b865bb07d0_8;
v000002b865bb07d0_9 .array/port v000002b865bb07d0, 9;
v000002b865bb07d0_10 .array/port v000002b865bb07d0, 10;
v000002b865bb07d0_11 .array/port v000002b865bb07d0, 11;
v000002b865bb07d0_12 .array/port v000002b865bb07d0, 12;
E_000002b865acdba0/6 .event anyedge, v000002b865bb07d0_9, v000002b865bb07d0_10, v000002b865bb07d0_11, v000002b865bb07d0_12;
v000002b865bb09b0_0 .array/port v000002b865bb09b0, 0;
v000002b865bb09b0_1 .array/port v000002b865bb09b0, 1;
v000002b865bb09b0_2 .array/port v000002b865bb09b0, 2;
v000002b865bb09b0_3 .array/port v000002b865bb09b0, 3;
E_000002b865acdba0/7 .event anyedge, v000002b865bb09b0_0, v000002b865bb09b0_1, v000002b865bb09b0_2, v000002b865bb09b0_3;
v000002b865bb09b0_4 .array/port v000002b865bb09b0, 4;
v000002b865bb09b0_5 .array/port v000002b865bb09b0, 5;
v000002b865bb09b0_6 .array/port v000002b865bb09b0, 6;
v000002b865bb09b0_7 .array/port v000002b865bb09b0, 7;
E_000002b865acdba0/8 .event anyedge, v000002b865bb09b0_4, v000002b865bb09b0_5, v000002b865bb09b0_6, v000002b865bb09b0_7;
v000002b865bb09b0_8 .array/port v000002b865bb09b0, 8;
v000002b865bb09b0_9 .array/port v000002b865bb09b0, 9;
v000002b865bb09b0_10 .array/port v000002b865bb09b0, 10;
v000002b865bb09b0_11 .array/port v000002b865bb09b0, 11;
E_000002b865acdba0/9 .event anyedge, v000002b865bb09b0_8, v000002b865bb09b0_9, v000002b865bb09b0_10, v000002b865bb09b0_11;
v000002b865bb09b0_12 .array/port v000002b865bb09b0, 12;
E_000002b865acdba0/10 .event anyedge, v000002b865bb09b0_12, v000002b865bb16d0_0, v000002b865bb16d0_1, v000002b865bb16d0_2;
E_000002b865acdba0/11 .event anyedge, v000002b865bb16d0_3, v000002b865bb16d0_4, v000002b865bb16d0_5, v000002b865bb16d0_6;
E_000002b865acdba0/12 .event anyedge, v000002b865bb16d0_7, v000002b865bb16d0_8, v000002b865bb16d0_9, v000002b865bb16d0_10;
E_000002b865acdba0/13 .event anyedge, v000002b865bb16d0_11;
E_000002b865acdba0 .event/or E_000002b865acdba0/0, E_000002b865acdba0/1, E_000002b865acdba0/2, E_000002b865acdba0/3, E_000002b865acdba0/4, E_000002b865acdba0/5, E_000002b865acdba0/6, E_000002b865acdba0/7, E_000002b865acdba0/8, E_000002b865acdba0/9, E_000002b865acdba0/10, E_000002b865acdba0/11, E_000002b865acdba0/12, E_000002b865acdba0/13;
S_000002b865bab8e0 .scope module, "u_demap" "qpsk_demap" 3 234, 9 1 0, S_000002b865b33340;
 .timescale -9 -12;
    .port_info 0 /INPUT 1 "clk";
    .port_info 1 /INPUT 1 "rst_n";
    .port_info 2 /INPUT 1 "in_valid";
    .port_info 3 /INPUT 16 "X1_re";
    .port_info 4 /INPUT 16 "X1_im";
    .port_info 5 /INPUT 16 "X2_re";
    .port_info 6 /INPUT 16 "X2_im";
    .port_info 7 /OUTPUT 1 "out_valid";
    .port_info 8 /OUTPUT 4 "bits_out";
P_000002b865acdc60 .param/l "DATA_W" 0 9 2, +C4<00000000000000000000000000010000>;
v000002b865bb0910_0 .net/s "X1_im", 15 0, v000002b865bb0c30_0;  alias, 1 drivers
v000002b865bb33c0_0 .net/s "X1_re", 15 0, v000002b865bb0a50_0;  alias, 1 drivers
v000002b865bb3aa0_0 .net/s "X2_im", 15 0, v000002b865bb1090_0;  alias, 1 drivers
v000002b865bb4360_0 .net/s "X2_re", 15 0, v000002b865bb0cd0_0;  alias, 1 drivers
v000002b865bb3c80_0 .var "bits_out", 3 0;
v000002b865bb2740_0 .net "clk", 0 0, v000002b865bcc9a0_0;  alias, 1 drivers
v000002b865bb27e0_0 .net "in_valid", 0 0, v000002b865bb1270_0;  alias, 1 drivers
v000002b865bb3fa0_0 .var "out_valid", 0 0;
v000002b865bb3dc0_0 .net "rst_n", 0 0, v000002b865bcf1a0_0;  alias, 1 drivers
S_000002b865bab750 .scope module, "u_fft1" "fft_64pt" 3 96, 10 1 0, S_000002b865b33340;
 .timescale -9 -12;
    .port_info 0 /INPUT 1 "clk";
    .port_info 1 /INPUT 1 "rst_n";
    .port_info 2 /INPUT 1 "i_start";
    .port_info 3 /OUTPUT 1 "o_done";
    .port_info 4 /INPUT 1 "i_load_valid";
    .port_info 5 /INPUT 16 "i_load_re";
    .port_info 6 /INPUT 16 "i_load_im";
    .port_info 7 /INPUT 6 "i_read_addr";
    .port_info 8 /OUTPUT 16 "o_read_re";
    .port_info 9 /OUTPUT 16 "o_read_im";
L_000002b865a2a060 .functor BUFZ 16, L_000002b865bd0690, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>;
L_000002b865a2a0d0 .functor BUFZ 16, L_000002b865bd3110, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>;
v000002b865bb2a60_0 .net *"_ivl_0", 15 0, L_000002b865bd0690;  1 drivers
v000002b865bb2ba0_0 .net *"_ivl_10", 15 0, L_000002b865bd3110;  1 drivers
v000002b865bb3be0_0 .net *"_ivl_12", 6 0, L_000002b865bd3c50;  1 drivers
v000002b865bb4040_0 .net *"_ivl_14", 8 0, L_000002b865bd50f0;  1 drivers
L_000002b865c10ca0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>;
v000002b865bb2f60_0 .net *"_ivl_17", 1 0, L_000002b865c10ca0;  1 drivers
v000002b865bb30a0_0 .net *"_ivl_2", 6 0, L_000002b865bd0730;  1 drivers
v000002b865bb3280_0 .net *"_ivl_4", 8 0, L_000002b865bd4b50;  1 drivers
L_000002b865c10c58 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>;
v000002b865bb3320_0 .net *"_ivl_7", 1 0, L_000002b865c10c58;  1 drivers
v000002b865bb3820_0 .var "bank_calc", 0 0;
v000002b865bb4400_0 .var "bank_in", 0 0;
v000002b865bb38c0_0 .net "clk", 0 0, v000002b865bcc9a0_0;  alias, 1 drivers
v000002b865bb8ed0_0 .net/s "i_load_im", 15 0, v000002b865bbbae0_0;  alias, 1 drivers
v000002b865bba410_0 .net/s "i_load_re", 15 0, v000002b865bbbf40_0;  alias, 1 drivers
v000002b865bb96f0_0 .net "i_load_valid", 0 0, v000002b865bbb720_0;  alias, 1 drivers
v000002b865bb9790_0 .net "i_read_addr", 5 0, v000002b865bcccc0_0;  1 drivers
L_000002b865c10ce8 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v000002b865bb95b0_0 .net "i_start", 0 0, L_000002b865c10ce8;  1 drivers
v000002b865bb9510_0 .var "input_ready_pulse", 0 0;
v000002b865bb9f10_0 .var "load_cnt", 6 0;
v000002b865bba370 .array/s "mem_im", 127 0, 15 0;
v000002b865bb9a10 .array/s "mem_re", 127 0, 15 0;
v000002b865bb9830_0 .var "o_done", 0 0;
v000002b865bb98d0_0 .net/s "o_read_im", 15 0, L_000002b865a2a0d0;  alias, 1 drivers
v000002b865bb9970_0 .net/s "o_read_re", 15 0, L_000002b865a2a060;  alias, 1 drivers
v000002b865bb9ab0_0 .var "pending_bank", 0 0;
v000002b865bb9fb0_0 .var "pending_valid", 0 0;
v000002b865bb9150_0 .var "read_hold", 6 0;
v000002b865bb91f0_0 .net "rst_n", 0 0, v000002b865bcf1a0_0;  alias, 1 drivers
L_000002b865bd0690 .array/port v000002b865bb9a10, L_000002b865bd4b50;
L_000002b865bd0730 .concat [ 6 1 0 0], v000002b865bcccc0_0, v000002b865bb3820_0;
L_000002b865bd4b50 .concat [ 7 2 0 0], L_000002b865bd0730, L_000002b865c10c58;
L_000002b865bd3110 .array/port v000002b865bba370, L_000002b865bd50f0;
L_000002b865bd3c50 .concat [ 6 1 0 0], v000002b865bcccc0_0, v000002b865bb3820_0;
L_000002b865bd50f0 .concat [ 7 2 0 0], L_000002b865bd3c50, L_000002b865c10ca0;
S_000002b865baba70 .scope function.vec4.s6, "bit_reverse" "bit_reverse" 10 29, 10 29 0, S_000002b865bab750;
 .timescale -9 -12;
; Variable bit_reverse is vec4 return value of scope S_000002b865baba70
v000002b865bb35a0_0 .var "in", 5 0;
TD_tb_top_receiver.u_top.u_fft1.bit_reverse ;
    %load/vec4 v000002b865bb35a0_0;
    %parti/s 1, 0, 2;
    %load/vec4 v000002b865bb35a0_0;
    %parti/s 1, 1, 2;
    %concat/vec4; draw_concat_vec4
    %load/vec4 v000002b865bb35a0_0;
    %parti/s 1, 2, 3;
    %concat/vec4; draw_concat_vec4
    %load/vec4 v000002b865bb35a0_0;
    %parti/s 1, 3, 3;
    %concat/vec4; draw_concat_vec4
    %load/vec4 v000002b865bb35a0_0;
    %parti/s 1, 4, 4;
    %concat/vec4; draw_concat_vec4
    %load/vec4 v000002b865bb35a0_0;
    %parti/s 1, 5, 4;
    %concat/vec4; draw_concat_vec4
    %ret/vec4 0, 0, 6;  Assign to bit_reverse (store_vec4_to_lval)
    %end;
S_000002b865babc00 .scope autotask, "run_fft" "run_fft" 10 110, 10 110 0, S_000002b865bab750;
 .timescale -9 -12;
v000002b865bb4220 .array/s "buf_im", 63 0, 15 0;
v000002b865bb3960 .array/s "buf_re", 63 0, 15 0;
v000002b865bb2880_0 .var/i "half", 31 0;
v000002b865bb31e0_0 .var/i "i", 31 0;
v000002b865bb2b00_0 .var/i "idx", 31 0;
v000002b865bb3140_0 .var/i "j", 31 0;
v000002b865bb3f00_0 .var/i "k", 31 0;
v000002b865bb2600_0 .var/i "m", 31 0;
v000002b865bb2ce0_0 .var/i "step", 31 0;
v000002b865bb40e0_0 .var/s "t_im", 31 0;
v000002b865bb3640_0 .var/s "t_re", 31 0;
v000002b865bb2c40_0 .var/s "u_im", 31 0;
v000002b865bb3e60_0 .var/s "u_re", 31 0;
v000002b865bb3000_0 .var/s "w_im", 15 0;
v000002b865bb3d20_0 .var/s "w_re", 15 0;
v000002b865bb2920_0 .var "which_bank", 0 0;
TD_tb_top_receiver.u_top.u_fft1.run_fft ;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000002b865bb31e0_0, 0, 32;
T_3.14 ;
    %load/vec4 v000002b865bb31e0_0;
    %cmpi/s 64, 0, 32;
    %jmp/0xz T_3.15, 5;
    %load/vec4 v000002b865bb2920_0;
    %load/vec4 v000002b865bb31e0_0;
    %parti/s 6, 0, 2;
    %concat/vec4; draw_concat_vec4
    %pad/u 9;
    %ix/vec4 4;
    %load/vec4a v000002b865bb9a10, 4;
    %ix/getv/s 4, v000002b865bb31e0_0;
    %store/vec4a v000002b865bb3960, 4, 0;
    %load/vec4 v000002b865bb2920_0;
    %load/vec4 v000002b865bb31e0_0;
    %parti/s 6, 0, 2;
    %concat/vec4; draw_concat_vec4
    %pad/u 9;
    %ix/vec4 4;
    %load/vec4a v000002b865bba370, 4;
    %ix/getv/s 4, v000002b865bb31e0_0;
    %store/vec4a v000002b865bb4220, 4, 0;
    %load/vec4 v000002b865bb31e0_0;
    %addi 1, 0, 32;
    %store/vec4 v000002b865bb31e0_0, 0, 32;
    %jmp T_3.14;
T_3.15 ;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000002b865bb31e0_0, 0, 32;
T_3.16 ;
    %load/vec4 v000002b865bb31e0_0;
    %cmpi/s 64, 0, 32;
    %jmp/0xz T_3.17, 5;
    %load/vec4 v000002b865bb31e0_0;
    %parti/s 6, 0, 2;
    %store/vec4 v000002b865bb35a0_0, 0, 6;
    %callf/vec4 TD_tb_top_receiver.u_top.u_fft1.bit_reverse, S_000002b865baba70;
    %pad/u 32;
    %store/vec4 v000002b865bb3140_0, 0, 32;
    %load/vec4 v000002b865bb31e0_0;
    %load/vec4 v000002b865bb3140_0;
    %cmp/s;
    %jmp/0xz  T_3.18, 5;
    %ix/getv/s 4, v000002b865bb31e0_0;
    %load/vec4a v000002b865bb3960, 4;
    %pad/s 32;
    %store/vec4 v000002b865bb3e60_0, 0, 32;
    %ix/getv/s 4, v000002b865bb31e0_0;
    %load/vec4a v000002b865bb4220, 4;
    %pad/s 32;
    %store/vec4 v000002b865bb2c40_0, 0, 32;
    %ix/getv/s 4, v000002b865bb3140_0;
    %load/vec4a v000002b865bb3960, 4;
    %ix/getv/s 4, v000002b865bb31e0_0;
    %store/vec4a v000002b865bb3960, 4, 0;
    %ix/getv/s 4, v000002b865bb3140_0;
    %load/vec4a v000002b865bb4220, 4;
    %ix/getv/s 4, v000002b865bb31e0_0;
    %store/vec4a v000002b865bb4220, 4, 0;
    %load/vec4 v000002b865bb3e60_0;
    %parti/s 16, 0, 2;
    %ix/getv/s 4, v000002b865bb3140_0;
    %store/vec4a v000002b865bb3960, 4, 0;
    %load/vec4 v000002b865bb2c40_0;
    %parti/s 16, 0, 2;
    %ix/getv/s 4, v000002b865bb3140_0;
    %store/vec4a v000002b865bb4220, 4, 0;
T_3.18 ;
    %load/vec4 v000002b865bb31e0_0;
    %addi 1, 0, 32;
    %store/vec4 v000002b865bb31e0_0, 0, 32;
    %jmp T_3.16;
T_3.17 ;
    %pushi/vec4 2, 0, 32;
    %store/vec4 v000002b865bb2600_0, 0, 32;
T_3.20 ;
    %load/vec4 v000002b865bb2600_0;
    %cmpi/s 64, 0, 32;
    %flag_or 5, 4;
    %jmp/0xz T_3.21, 5;
    %load/vec4 v000002b865bb2600_0;
    %ix/load 4, 1, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %store/vec4 v000002b865bb2880_0, 0, 32;
    %pushi/vec4 64, 0, 32;
    %load/vec4 v000002b865bb2600_0;
    %div/s;
    %store/vec4 v000002b865bb2ce0_0, 0, 32;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000002b865bb3f00_0, 0, 32;
T_3.22 ;
    %load/vec4 v000002b865bb3f00_0;
    %cmpi/s 64, 0, 32;
    %jmp/0xz T_3.23, 5;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000002b865bb3140_0, 0, 32;
T_3.24 ;
    %load/vec4 v000002b865bb3140_0;
    %load/vec4 v000002b865bb2880_0;
    %cmp/s;
    %jmp/0xz T_3.25, 5;
    %load/vec4 v000002b865bb3140_0;
    %load/vec4 v000002b865bb2ce0_0;
    %mul;
    %store/vec4 v000002b865bb2b00_0, 0, 32;
    %load/vec4 v000002b865bb2b00_0;
    %store/vec4 v000002b865bb42c0_0, 0, 32;
    %callf/vec4 TD_tb_top_receiver.u_top.u_fft1.tw_re, S_000002b865bb4930;
    %store/vec4 v000002b865bb3d20_0, 0, 16;
    %load/vec4 v000002b865bb2b00_0;
    %store/vec4 v000002b865bb4180_0, 0, 32;
    %callf/vec4 TD_tb_top_receiver.u_top.u_fft1.tw_im, S_000002b865bb5d80;
    %store/vec4 v000002b865bb3000_0, 0, 16;
    %load/vec4 v000002b865bb3f00_0;
    %load/vec4 v000002b865bb3140_0;
    %add;
    %load/vec4 v000002b865bb2880_0;
    %add;
    %ix/vec4/s 4;
    %load/vec4a v000002b865bb3960, 4;
    %pad/s 32;
    %load/vec4 v000002b865bb3d20_0;
    %pad/s 32;
    %mul;
    %load/vec4 v000002b865bb3f00_0;
    %load/vec4 v000002b865bb3140_0;
    %add;
    %load/vec4 v000002b865bb2880_0;
    %add;
    %ix/vec4/s 4;
    %load/vec4a v000002b865bb4220, 4;
    %pad/s 32;
    %load/vec4 v000002b865bb3000_0;
    %pad/s 32;
    %mul;
    %sub;
    %pushi/vec4 11, 0, 32;
    %store/vec4 v000002b865bb36e0_0, 0, 32;
    %store/vec4 v000002b865bb26a0_0, 0, 32;
    %callf/vec4 TD_tb_top_receiver.u_top.u_fft1.trunc_shift, S_000002b865bb5290;
    %store/vec4 v000002b865bb3640_0, 0, 32;
    %load/vec4 v000002b865bb3f00_0;
    %load/vec4 v000002b865bb3140_0;
    %add;
    %load/vec4 v000002b865bb2880_0;
    %add;
    %ix/vec4/s 4;
    %load/vec4a v000002b865bb3960, 4;
    %pad/s 32;
    %load/vec4 v000002b865bb3000_0;
    %pad/s 32;
    %mul;
    %load/vec4 v000002b865bb3f00_0;
    %load/vec4 v000002b865bb3140_0;
    %add;
    %load/vec4 v000002b865bb2880_0;
    %add;
    %ix/vec4/s 4;
    %load/vec4a v000002b865bb4220, 4;
    %pad/s 32;
    %load/vec4 v000002b865bb3d20_0;
    %pad/s 32;
    %mul;
    %add;
    %pushi/vec4 11, 0, 32;
    %store/vec4 v000002b865bb36e0_0, 0, 32;
    %store/vec4 v000002b865bb26a0_0, 0, 32;
    %callf/vec4 TD_tb_top_receiver.u_top.u_fft1.trunc_shift, S_000002b865bb5290;
    %store/vec4 v000002b865bb40e0_0, 0, 32;
    %load/vec4 v000002b865bb3f00_0;
    %load/vec4 v000002b865bb3140_0;
    %add;
    %ix/vec4/s 4;
    %load/vec4a v000002b865bb3960, 4;
    %pad/s 32;
    %store/vec4 v000002b865bb3e60_0, 0, 32;
    %load/vec4 v000002b865bb3f00_0;
    %load/vec4 v000002b865bb3140_0;
    %add;
    %ix/vec4/s 4;
    %load/vec4a v000002b865bb4220, 4;
    %pad/s 32;
    %store/vec4 v000002b865bb2c40_0, 0, 32;
    %load/vec4 v000002b865bb3e60_0;
    %load/vec4 v000002b865bb3640_0;
    %add;
    %store/vec4 v000002b865bb29c0_0, 0, 32;
    %callf/vec4 TD_tb_top_receiver.u_top.u_fft1.sat16, S_000002b865babd90;
    %load/vec4 v000002b865bb3f00_0;
    %load/vec4 v000002b865bb3140_0;
    %add;
    %ix/vec4/s 4;
    %store/vec4a v000002b865bb3960, 4, 0;
    %load/vec4 v000002b865bb2c40_0;
    %load/vec4 v000002b865bb40e0_0;
    %add;
    %store/vec4 v000002b865bb29c0_0, 0, 32;
    %callf/vec4 TD_tb_top_receiver.u_top.u_fft1.sat16, S_000002b865babd90;
    %load/vec4 v000002b865bb3f00_0;
    %load/vec4 v000002b865bb3140_0;
    %add;
    %ix/vec4/s 4;
    %store/vec4a v000002b865bb4220, 4, 0;
    %load/vec4 v000002b865bb3e60_0;
    %load/vec4 v000002b865bb3640_0;
    %sub;
    %store/vec4 v000002b865bb29c0_0, 0, 32;
    %callf/vec4 TD_tb_top_receiver.u_top.u_fft1.sat16, S_000002b865babd90;
    %load/vec4 v000002b865bb3f00_0;
    %load/vec4 v000002b865bb3140_0;
    %add;
    %load/vec4 v000002b865bb2880_0;
    %add;
    %ix/vec4/s 4;
    %store/vec4a v000002b865bb3960, 4, 0;
    %load/vec4 v000002b865bb2c40_0;
    %load/vec4 v000002b865bb40e0_0;
    %sub;
    %store/vec4 v000002b865bb29c0_0, 0, 32;
    %callf/vec4 TD_tb_top_receiver.u_top.u_fft1.sat16, S_000002b865babd90;
    %load/vec4 v000002b865bb3f00_0;
    %load/vec4 v000002b865bb3140_0;
    %add;
    %load/vec4 v000002b865bb2880_0;
    %add;
    %ix/vec4/s 4;
    %store/vec4a v000002b865bb4220, 4, 0;
    %load/vec4 v000002b865bb3140_0;
    %addi 1, 0, 32;
    %store/vec4 v000002b865bb3140_0, 0, 32;
    %jmp T_3.24;
T_3.25 ;
    %load/vec4 v000002b865bb3f00_0;
    %load/vec4 v000002b865bb2600_0;
    %add;
    %store/vec4 v000002b865bb3f00_0, 0, 32;
    %jmp T_3.22;
T_3.23 ;
    %load/vec4 v000002b865bb2600_0;
    %ix/load 4, 1, 0;
    %flag_set/imm 4, 0;
    %shiftl 4;
    %store/vec4 v000002b865bb2600_0, 0, 32;
    %jmp T_3.20;
T_3.21 ;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000002b865bb31e0_0, 0, 32;
T_3.26 ;
    %load/vec4 v000002b865bb31e0_0;
    %cmpi/s 64, 0, 32;
    %jmp/0xz T_3.27, 5;
    %ix/getv/s 4, v000002b865bb31e0_0;
    %load/vec4a v000002b865bb3960, 4;
    %load/vec4 v000002b865bb2920_0;
    %load/vec4 v000002b865bb31e0_0;
    %parti/s 6, 0, 2;
    %concat/vec4; draw_concat_vec4
    %pad/u 9;
    %ix/vec4 3;
    %ix/load 4, 0, 0; Constant delay
    %assign/vec4/a/d v000002b865bb9a10, 0, 4;
    %ix/getv/s 4, v000002b865bb31e0_0;
    %load/vec4a v000002b865bb4220, 4;
    %load/vec4 v000002b865bb2920_0;
    %load/vec4 v000002b865bb31e0_0;
    %parti/s 6, 0, 2;
    %concat/vec4; draw_concat_vec4
    %pad/u 9;
    %ix/vec4 3;
    %ix/load 4, 0, 0; Constant delay
    %assign/vec4/a/d v000002b865bba370, 0, 4;
    %load/vec4 v000002b865bb31e0_0;
    %addi 1, 0, 32;
    %store/vec4 v000002b865bb31e0_0, 0, 32;
    %jmp T_3.26;
T_3.27 ;
    %end;
S_000002b865babd90 .scope function.vec4.u16, "sat16" "sat16" 10 37, 10 37 0, S_000002b865bab750;
 .timescale -9 -12;
; Variable sat16 is vec4 return value of scope S_000002b865babd90
v000002b865bb29c0_0 .var/s "val", 31 0;
TD_tb_top_receiver.u_top.u_fft1.sat16 ;
    %load/vec4 v000002b865bb29c0_0;
    %cmpi/s 32767, 0, 32;
    %flag_or 5, 4; GT is !LE
    %flag_inv 5;
    %jmp/0xz  T_4.28, 5;
    %pushi/vec4 32767, 0, 16;
    %ret/vec4 0, 0, 16;  Assign to sat16 (store_vec4_to_lval)
    %jmp T_4.29;
T_4.28 ;
    %load/vec4 v000002b865bb29c0_0;
    %cmpi/s 4294934528, 0, 32;
    %jmp/0xz  T_4.30, 5;
    %pushi/vec4 32768, 0, 16;
    %ret/vec4 0, 0, 16;  Assign to sat16 (store_vec4_to_lval)
    %jmp T_4.31;
T_4.30 ;
    %load/vec4 v000002b865bb29c0_0;
    %parti/s 16, 0, 2;
    %ret/vec4 0, 0, 16;  Assign to sat16 (store_vec4_to_lval)
T_4.31 ;
T_4.29 ;
    %end;
S_000002b865bb5290 .scope function.vec4.u32, "trunc_shift" "trunc_shift" 10 47, 10 47 0, S_000002b865bab750;
 .timescale -9 -12;
v000002b865bb36e0_0 .var/i "sh", 31 0;
; Variable trunc_shift is vec4 return value of scope S_000002b865bb5290
v000002b865bb26a0_0 .var/s "val", 31 0;
TD_tb_top_receiver.u_top.u_fft1.trunc_shift ;
    %load/vec4 v000002b865bb26a0_0;
    %load/vec4 v000002b865bb36e0_0;
    %ix/vec4 4;
    %shiftr/s 4;
    %ret/vec4 0, 0, 32;  Assign to trunc_shift (store_vec4_to_lval)
    %end;
S_000002b865bb5d80 .scope function.vec4.u16, "tw_im" "tw_im" 10 69, 10 69 0, S_000002b865bab750;
 .timescale -9 -12;
v000002b865bb3460_0 .var/real "ang", 0 0;
v000002b865bb4180_0 .var/i "idx", 31 0;
v000002b865bb3b40_0 .var/real "s", 0 0;
; Variable tw_im is vec4 return value of scope S_000002b865bb5d80
TD_tb_top_receiver.u_top.u_fft1.tw_im ;
    %pushi/real 1686629713, 20452; load=-6.28319
    %pushi/real 273688, 20430; load=-6.28319
    %add/wr;
    %load/vec4 v000002b865bb4180_0;
    %cvt/rv/s;
    %mul/wr;
    %pushi/real 1073741824, 4072; load=64.0000
    %div/wr;
    %store/real v000002b865bb3460_0;
    %vpi_func/r 10 75 "$sin", v000002b865bb3460_0 {0 0 0};
    %pushi/real 1073741824, 4077; load=2048.00
    %mul/wr;
    %store/real v000002b865bb3b40_0;
    %pushi/real 2147418112, 4080; load=32767.0
    %load/real v000002b865bb3b40_0;
    %cmp/wr;
    %jmp/0xz  T_6.32, 5;
    %pushi/vec4 32767, 0, 16;
    %ret/vec4 0, 0, 16;  Assign to tw_im (store_vec4_to_lval)
    %jmp T_6.33;
T_6.32 ;
    %load/real v000002b865bb3b40_0;
    %pushi/real 1073741824, 20465; load=-32768.0
    %cmp/wr;
    %jmp/0xz  T_6.34, 5;
    %pushi/vec4 32768, 0, 16;
    %ret/vec4 0, 0, 16;  Assign to tw_im (store_vec4_to_lval)
    %jmp T_6.35;
T_6.34 ;
    %vpi_func 10 78 "$rtoi" 32, v000002b865bb3b40_0 {0 0 0};
    %pad/s 16;
    %ret/vec4 0, 0, 16;  Assign to tw_im (store_vec4_to_lval)
T_6.35 ;
T_6.33 ;
    %end;
S_000002b865bb4930 .scope function.vec4.u16, "tw_re" "tw_re" 10 56, 10 56 0, S_000002b865bab750;
 .timescale -9 -12;
v000002b865bb2e20_0 .var/real "ang", 0 0;
v000002b865bb3a00_0 .var/real "c", 0 0;
v000002b865bb42c0_0 .var/i "idx", 31 0;
; Variable tw_re is vec4 return value of scope S_000002b865bb4930
TD_tb_top_receiver.u_top.u_fft1.tw_re ;
    %pushi/real 1686629713, 20452; load=-6.28319
    %pushi/real 273688, 20430; load=-6.28319
    %add/wr;
    %load/vec4 v000002b865bb42c0_0;
    %cvt/rv/s;
    %mul/wr;
    %pushi/real 1073741824, 4072; load=64.0000
    %div/wr;
    %store/real v000002b865bb2e20_0;
    %vpi_func/r 10 62 "$cos", v000002b865bb2e20_0 {0 0 0};
    %pushi/real 1073741824, 4077; load=2048.00
    %mul/wr;
    %store/real v000002b865bb3a00_0;
    %pushi/real 2147418112, 4080; load=32767.0
    %load/real v000002b865bb3a00_0;
    %cmp/wr;
    %jmp/0xz  T_7.36, 5;
    %pushi/vec4 32767, 0, 16;
    %ret/vec4 0, 0, 16;  Assign to tw_re (store_vec4_to_lval)
    %jmp T_7.37;
T_7.36 ;
    %load/real v000002b865bb3a00_0;
    %pushi/real 1073741824, 20465; load=-32768.0
    %cmp/wr;
    %jmp/0xz  T_7.38, 5;
    %pushi/vec4 32768, 0, 16;
    %ret/vec4 0, 0, 16;  Assign to tw_re (store_vec4_to_lval)
    %jmp T_7.39;
T_7.38 ;
    %vpi_func 10 65 "$rtoi" 32, v000002b865bb3a00_0 {0 0 0};
    %pad/s 16;
    %ret/vec4 0, 0, 16;  Assign to tw_re (store_vec4_to_lval)
T_7.39 ;
T_7.37 ;
    %end;
S_000002b865bb5bf0 .scope module, "u_fft2" "fft_64pt" 3 107, 10 1 0, S_000002b865b33340;
 .timescale -9 -12;
    .port_info 0 /INPUT 1 "clk";
    .port_info 1 /INPUT 1 "rst_n";
    .port_info 2 /INPUT 1 "i_start";
    .port_info 3 /OUTPUT 1 "o_done";
    .port_info 4 /INPUT 1 "i_load_valid";
    .port_info 5 /INPUT 16 "i_load_re";
    .port_info 6 /INPUT 16 "i_load_im";
    .port_info 7 /INPUT 6 "i_read_addr";
    .port_info 8 /OUTPUT 16 "o_read_re";
    .port_info 9 /OUTPUT 16 "o_read_im";
L_000002b865a2a610 .functor BUFZ 16, L_000002b865bd3f70, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>;
L_000002b865a2a680 .functor BUFZ 16, L_000002b865bd52d0, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>;
v000002b865bb7210_0 .net *"_ivl_0", 15 0, L_000002b865bd3f70;  1 drivers
v000002b865bb8bb0_0 .net *"_ivl_10", 15 0, L_000002b865bd52d0;  1 drivers
v000002b865bb72b0_0 .net *"_ivl_12", 6 0, L_000002b865bd43d0;  1 drivers
v000002b865bb6ef0_0 .net *"_ivl_14", 8 0, L_000002b865bd4510;  1 drivers
L_000002b865c10d78 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>;
v000002b865bb8750_0 .net *"_ivl_17", 1 0, L_000002b865c10d78;  1 drivers
v000002b865bb6950_0 .net *"_ivl_2", 6 0, L_000002b865bd3570;  1 drivers
v000002b865bb8c50_0 .net *"_ivl_4", 8 0, L_000002b865bd41f0;  1 drivers
L_000002b865c10d30 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>;
v000002b865bb8cf0_0 .net *"_ivl_7", 1 0, L_000002b865c10d30;  1 drivers
v000002b865bb6d10_0 .var "bank_calc", 0 0;
v000002b865bb81b0_0 .var "bank_in", 0 0;
v000002b865bb7850_0 .net "clk", 0 0, v000002b865bcc9a0_0;  alias, 1 drivers
v000002b865bb7350_0 .net/s "i_load_im", 15 0, v000002b865bbc260_0;  alias, 1 drivers
v000002b865bb8930_0 .net/s "i_load_re", 15 0, v000002b865bba820_0;  alias, 1 drivers
v000002b865bb7a30_0 .net "i_load_valid", 0 0, v000002b865bbb720_0;  alias, 1 drivers
v000002b865bb6db0_0 .net "i_read_addr", 5 0, v000002b865bcccc0_0;  alias, 1 drivers
L_000002b865c10dc0 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v000002b865bb8d90_0 .net "i_start", 0 0, L_000002b865c10dc0;  1 drivers
v000002b865bb8a70_0 .var "input_ready_pulse", 0 0;
v000002b865bb7fd0_0 .var "load_cnt", 6 0;
v000002b865bb69f0 .array/s "mem_im", 127 0, 15 0;
v000002b865bb7df0 .array/s "mem_re", 127 0, 15 0;
v000002b865bb75d0_0 .var "o_done", 0 0;
v000002b865bb78f0_0 .net/s "o_read_im", 15 0, L_000002b865a2a680;  alias, 1 drivers
v000002b865bb7c10_0 .net/s "o_read_re", 15 0, L_000002b865a2a610;  alias, 1 drivers
v000002b865bb73f0_0 .var "pending_bank", 0 0;
v000002b865bb86b0_0 .var "pending_valid", 0 0;
v000002b865bb87f0_0 .var "read_hold", 6 0;
v000002b865bb8070_0 .net "rst_n", 0 0, v000002b865bcf1a0_0;  alias, 1 drivers
L_000002b865bd3f70 .array/port v000002b865bb7df0, L_000002b865bd41f0;
L_000002b865bd3570 .concat [ 6 1 0 0], v000002b865bcccc0_0, v000002b865bb6d10_0;
L_000002b865bd41f0 .concat [ 7 2 0 0], L_000002b865bd3570, L_000002b865c10d30;
L_000002b865bd52d0 .array/port v000002b865bb69f0, L_000002b865bd4510;
L_000002b865bd43d0 .concat [ 6 1 0 0], v000002b865bcccc0_0, v000002b865bb6d10_0;
L_000002b865bd4510 .concat [ 7 2 0 0], L_000002b865bd43d0, L_000002b865c10d78;
S_000002b865bb4ac0 .scope function.vec4.s6, "bit_reverse" "bit_reverse" 10 29, 10 29 0, S_000002b865bb5bf0;
 .timescale -9 -12;
; Variable bit_reverse is vec4 return value of scope S_000002b865bb4ac0
v000002b865bb9290_0 .var "in", 5 0;
TD_tb_top_receiver.u_top.u_fft2.bit_reverse ;
    %load/vec4 v000002b865bb9290_0;
    %parti/s 1, 0, 2;
    %load/vec4 v000002b865bb9290_0;
    %parti/s 1, 1, 2;
    %concat/vec4; draw_concat_vec4
    %load/vec4 v000002b865bb9290_0;
    %parti/s 1, 2, 3;
    %concat/vec4; draw_concat_vec4
    %load/vec4 v000002b865bb9290_0;
    %parti/s 1, 3, 3;
    %concat/vec4; draw_concat_vec4
    %load/vec4 v000002b865bb9290_0;
    %parti/s 1, 4, 4;
    %concat/vec4; draw_concat_vec4
    %load/vec4 v000002b865bb9290_0;
    %parti/s 1, 5, 4;
    %concat/vec4; draw_concat_vec4
    %ret/vec4 0, 0, 6;  Assign to bit_reverse (store_vec4_to_lval)
    %end;
S_000002b865bb4f70 .scope autotask, "run_fft" "run_fft" 10 110, 10 110 0, S_000002b865bb5bf0;
 .timescale -9 -12;
v000002b865bba230 .array/s "buf_im", 63 0, 15 0;
v000002b865bb9c90 .array/s "buf_re", 63 0, 15 0;
v000002b865bb9dd0_0 .var/i "half", 31 0;
v000002b865bba2d0_0 .var/i "i", 31 0;
v000002b865bb9b50_0 .var/i "idx", 31 0;
v000002b865bb93d0_0 .var/i "j", 31 0;
v000002b865bb9650_0 .var/i "k", 31 0;
v000002b865bba4b0_0 .var/i "m", 31 0;
v000002b865bb9bf0_0 .var/i "step", 31 0;
v000002b865bb9d30_0 .var/s "t_im", 31 0;
v000002b865bba0f0_0 .var/s "t_re", 31 0;
v000002b865bba190_0 .var/s "u_im", 31 0;
v000002b865bb8e30_0 .var/s "u_re", 31 0;
v000002b865bb9e70_0 .var/s "w_im", 15 0;
v000002b865bb9010_0 .var/s "w_re", 15 0;
v000002b865bb9470_0 .var "which_bank", 0 0;
TD_tb_top_receiver.u_top.u_fft2.run_fft ;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000002b865bba2d0_0, 0, 32;
T_9.40 ;
    %load/vec4 v000002b865bba2d0_0;
    %cmpi/s 64, 0, 32;
    %jmp/0xz T_9.41, 5;
    %load/vec4 v000002b865bb9470_0;
    %load/vec4 v000002b865bba2d0_0;
    %parti/s 6, 0, 2;
    %concat/vec4; draw_concat_vec4
    %pad/u 9;
    %ix/vec4 4;
    %load/vec4a v000002b865bb7df0, 4;
    %ix/getv/s 4, v000002b865bba2d0_0;
    %store/vec4a v000002b865bb9c90, 4, 0;
    %load/vec4 v000002b865bb9470_0;
    %load/vec4 v000002b865bba2d0_0;
    %parti/s 6, 0, 2;
    %concat/vec4; draw_concat_vec4
    %pad/u 9;
    %ix/vec4 4;
    %load/vec4a v000002b865bb69f0, 4;
    %ix/getv/s 4, v000002b865bba2d0_0;
    %store/vec4a v000002b865bba230, 4, 0;
    %load/vec4 v000002b865bba2d0_0;
    %addi 1, 0, 32;
    %store/vec4 v000002b865bba2d0_0, 0, 32;
    %jmp T_9.40;
T_9.41 ;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000002b865bba2d0_0, 0, 32;
T_9.42 ;
    %load/vec4 v000002b865bba2d0_0;
    %cmpi/s 64, 0, 32;
    %jmp/0xz T_9.43, 5;
    %load/vec4 v000002b865bba2d0_0;
    %parti/s 6, 0, 2;
    %store/vec4 v000002b865bb9290_0, 0, 6;
    %callf/vec4 TD_tb_top_receiver.u_top.u_fft2.bit_reverse, S_000002b865bb4ac0;
    %pad/u 32;
    %store/vec4 v000002b865bb93d0_0, 0, 32;
    %load/vec4 v000002b865bba2d0_0;
    %load/vec4 v000002b865bb93d0_0;
    %cmp/s;
    %jmp/0xz  T_9.44, 5;
    %ix/getv/s 4, v000002b865bba2d0_0;
    %load/vec4a v000002b865bb9c90, 4;
    %pad/s 32;
    %store/vec4 v000002b865bb8e30_0, 0, 32;
    %ix/getv/s 4, v000002b865bba2d0_0;
    %load/vec4a v000002b865bba230, 4;
    %pad/s 32;
    %store/vec4 v000002b865bba190_0, 0, 32;
    %ix/getv/s 4, v000002b865bb93d0_0;
    %load/vec4a v000002b865bb9c90, 4;
    %ix/getv/s 4, v000002b865bba2d0_0;
    %store/vec4a v000002b865bb9c90, 4, 0;
    %ix/getv/s 4, v000002b865bb93d0_0;
    %load/vec4a v000002b865bba230, 4;
    %ix/getv/s 4, v000002b865bba2d0_0;
    %store/vec4a v000002b865bba230, 4, 0;
    %load/vec4 v000002b865bb8e30_0;
    %parti/s 16, 0, 2;
    %ix/getv/s 4, v000002b865bb93d0_0;
    %store/vec4a v000002b865bb9c90, 4, 0;
    %load/vec4 v000002b865bba190_0;
    %parti/s 16, 0, 2;
    %ix/getv/s 4, v000002b865bb93d0_0;
    %store/vec4a v000002b865bba230, 4, 0;
T_9.44 ;
    %load/vec4 v000002b865bba2d0_0;
    %addi 1, 0, 32;
    %store/vec4 v000002b865bba2d0_0, 0, 32;
    %jmp T_9.42;
T_9.43 ;
    %pushi/vec4 2, 0, 32;
    %store/vec4 v000002b865bba4b0_0, 0, 32;
T_9.46 ;
    %load/vec4 v000002b865bba4b0_0;
    %cmpi/s 64, 0, 32;
    %flag_or 5, 4;
    %jmp/0xz T_9.47, 5;
    %load/vec4 v000002b865bba4b0_0;
    %ix/load 4, 1, 0;
    %flag_set/imm 4, 0;
    %shiftr 4;
    %store/vec4 v000002b865bb9dd0_0, 0, 32;
    %pushi/vec4 64, 0, 32;
    %load/vec4 v000002b865bba4b0_0;
    %div/s;
    %store/vec4 v000002b865bb9bf0_0, 0, 32;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000002b865bb9650_0, 0, 32;
T_9.48 ;
    %load/vec4 v000002b865bb9650_0;
    %cmpi/s 64, 0, 32;
    %jmp/0xz T_9.49, 5;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000002b865bb93d0_0, 0, 32;
T_9.50 ;
    %load/vec4 v000002b865bb93d0_0;
    %load/vec4 v000002b865bb9dd0_0;
    %cmp/s;
    %jmp/0xz T_9.51, 5;
    %load/vec4 v000002b865bb93d0_0;
    %load/vec4 v000002b865bb9bf0_0;
    %mul;
    %store/vec4 v000002b865bb9b50_0, 0, 32;
    %load/vec4 v000002b865bb9b50_0;
    %store/vec4 v000002b865bb7490_0, 0, 32;
    %callf/vec4 TD_tb_top_receiver.u_top.u_fft2.tw_re, S_000002b865bb4610;
    %store/vec4 v000002b865bb9010_0, 0, 16;
    %load/vec4 v000002b865bb9b50_0;
    %store/vec4 v000002b865bb8570_0, 0, 32;
    %callf/vec4 TD_tb_top_receiver.u_top.u_fft2.tw_im, S_000002b865bb5740;
    %store/vec4 v000002b865bb9e70_0, 0, 16;
    %load/vec4 v000002b865bb9650_0;
    %load/vec4 v000002b865bb93d0_0;
    %add;
    %load/vec4 v000002b865bb9dd0_0;
    %add;
    %ix/vec4/s 4;
    %load/vec4a v000002b865bb9c90, 4;
    %pad/s 32;
    %load/vec4 v000002b865bb9010_0;
    %pad/s 32;
    %mul;
    %load/vec4 v000002b865bb9650_0;
    %load/vec4 v000002b865bb93d0_0;
    %add;
    %load/vec4 v000002b865bb9dd0_0;
    %add;
    %ix/vec4/s 4;
    %load/vec4a v000002b865bba230, 4;
    %pad/s 32;
    %load/vec4 v000002b865bb9e70_0;
    %pad/s 32;
    %mul;
    %sub;
    %pushi/vec4 11, 0, 32;
    %store/vec4 v000002b865bba050_0, 0, 32;
    %store/vec4 v000002b865bb7170_0, 0, 32;
    %callf/vec4 TD_tb_top_receiver.u_top.u_fft2.trunc_shift, S_000002b865bb47a0;
    %store/vec4 v000002b865bba0f0_0, 0, 32;
    %load/vec4 v000002b865bb9650_0;
    %load/vec4 v000002b865bb93d0_0;
    %add;
    %load/vec4 v000002b865bb9dd0_0;
    %add;
    %ix/vec4/s 4;
    %load/vec4a v000002b865bb9c90, 4;
    %pad/s 32;
    %load/vec4 v000002b865bb9e70_0;
    %pad/s 32;
    %mul;
    %load/vec4 v000002b865bb9650_0;
    %load/vec4 v000002b865bb93d0_0;
    %add;
    %load/vec4 v000002b865bb9dd0_0;
    %add;
    %ix/vec4/s 4;
    %load/vec4a v000002b865bba230, 4;
    %pad/s 32;
    %load/vec4 v000002b865bb9010_0;
    %pad/s 32;
    %mul;
    %add;
    %pushi/vec4 11, 0, 32;
    %store/vec4 v000002b865bba050_0, 0, 32;
    %store/vec4 v000002b865bb7170_0, 0, 32;
    %callf/vec4 TD_tb_top_receiver.u_top.u_fft2.trunc_shift, S_000002b865bb47a0;
    %store/vec4 v000002b865bb9d30_0, 0, 32;
    %load/vec4 v000002b865bb9650_0;
    %load/vec4 v000002b865bb93d0_0;
    %add;
    %ix/vec4/s 4;
    %load/vec4a v000002b865bb9c90, 4;
    %pad/s 32;
    %store/vec4 v000002b865bb8e30_0, 0, 32;
    %load/vec4 v000002b865bb9650_0;
    %load/vec4 v000002b865bb93d0_0;
    %add;
    %ix/vec4/s 4;
    %load/vec4a v000002b865bba230, 4;
    %pad/s 32;
    %store/vec4 v000002b865bba190_0, 0, 32;
    %load/vec4 v000002b865bb8e30_0;
    %load/vec4 v000002b865bba0f0_0;
    %add;
    %store/vec4 v000002b865bb8f70_0, 0, 32;
    %callf/vec4 TD_tb_top_receiver.u_top.u_fft2.sat16, S_000002b865bb55b0;
    %load/vec4 v000002b865bb9650_0;
    %load/vec4 v000002b865bb93d0_0;
    %add;
    %ix/vec4/s 4;
    %store/vec4a v000002b865bb9c90, 4, 0;
    %load/vec4 v000002b865bba190_0;
    %load/vec4 v000002b865bb9d30_0;
    %add;
    %store/vec4 v000002b865bb8f70_0, 0, 32;
    %callf/vec4 TD_tb_top_receiver.u_top.u_fft2.sat16, S_000002b865bb55b0;
    %load/vec4 v000002b865bb9650_0;
    %load/vec4 v000002b865bb93d0_0;
    %add;
    %ix/vec4/s 4;
    %store/vec4a v000002b865bba230, 4, 0;
    %load/vec4 v000002b865bb8e30_0;
    %load/vec4 v000002b865bba0f0_0;
    %sub;
    %store/vec4 v000002b865bb8f70_0, 0, 32;
    %callf/vec4 TD_tb_top_receiver.u_top.u_fft2.sat16, S_000002b865bb55b0;
    %load/vec4 v000002b865bb9650_0;
    %load/vec4 v000002b865bb93d0_0;
    %add;
    %load/vec4 v000002b865bb9dd0_0;
    %add;
    %ix/vec4/s 4;
    %store/vec4a v000002b865bb9c90, 4, 0;
    %load/vec4 v000002b865bba190_0;
    %load/vec4 v000002b865bb9d30_0;
    %sub;
    %store/vec4 v000002b865bb8f70_0, 0, 32;
    %callf/vec4 TD_tb_top_receiver.u_top.u_fft2.sat16, S_000002b865bb55b0;
    %load/vec4 v000002b865bb9650_0;
    %load/vec4 v000002b865bb93d0_0;
    %add;
    %load/vec4 v000002b865bb9dd0_0;
    %add;
    %ix/vec4/s 4;
    %store/vec4a v000002b865bba230, 4, 0;
    %load/vec4 v000002b865bb93d0_0;
    %addi 1, 0, 32;
    %store/vec4 v000002b865bb93d0_0, 0, 32;
    %jmp T_9.50;
T_9.51 ;
    %load/vec4 v000002b865bb9650_0;
    %load/vec4 v000002b865bba4b0_0;
    %add;
    %store/vec4 v000002b865bb9650_0, 0, 32;
    %jmp T_9.48;
T_9.49 ;
    %load/vec4 v000002b865bba4b0_0;
    %ix/load 4, 1, 0;
    %flag_set/imm 4, 0;
    %shiftl 4;
    %store/vec4 v000002b865bba4b0_0, 0, 32;
    %jmp T_9.46;
T_9.47 ;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000002b865bba2d0_0, 0, 32;
T_9.52 ;
    %load/vec4 v000002b865bba2d0_0;
    %cmpi/s 64, 0, 32;
    %jmp/0xz T_9.53, 5;
    %ix/getv/s 4, v000002b865bba2d0_0;
    %load/vec4a v000002b865bb9c90, 4;
    %load/vec4 v000002b865bb9470_0;
    %load/vec4 v000002b865bba2d0_0;
    %parti/s 6, 0, 2;
    %concat/vec4; draw_concat_vec4
    %pad/u 9;
    %ix/vec4 3;
    %ix/load 4, 0, 0; Constant delay
    %assign/vec4/a/d v000002b865bb7df0, 0, 4;
    %ix/getv/s 4, v000002b865bba2d0_0;
    %load/vec4a v000002b865bba230, 4;
    %load/vec4 v000002b865bb9470_0;
    %load/vec4 v000002b865bba2d0_0;
    %parti/s 6, 0, 2;
    %concat/vec4; draw_concat_vec4
    %pad/u 9;
    %ix/vec4 3;
    %ix/load 4, 0, 0; Constant delay
    %assign/vec4/a/d v000002b865bb69f0, 0, 4;
    %load/vec4 v000002b865bba2d0_0;
    %addi 1, 0, 32;
    %store/vec4 v000002b865bba2d0_0, 0, 32;
    %jmp T_9.52;
T_9.53 ;
    %end;
S_000002b865bb55b0 .scope function.vec4.u16, "sat16" "sat16" 10 37, 10 37 0, S_000002b865bb5bf0;
 .timescale -9 -12;
; Variable sat16 is vec4 return value of scope S_000002b865bb55b0
v000002b865bb8f70_0 .var/s "val", 31 0;
TD_tb_top_receiver.u_top.u_fft2.sat16 ;
    %load/vec4 v000002b865bb8f70_0;
    %cmpi/s 32767, 0, 32;
    %flag_or 5, 4; GT is !LE
    %flag_inv 5;
    %jmp/0xz  T_10.54, 5;
    %pushi/vec4 32767, 0, 16;
    %ret/vec4 0, 0, 16;  Assign to sat16 (store_vec4_to_lval)
    %jmp T_10.55;
T_10.54 ;
    %load/vec4 v000002b865bb8f70_0;
    %cmpi/s 4294934528, 0, 32;
    %jmp/0xz  T_10.56, 5;
    %pushi/vec4 32768, 0, 16;
    %ret/vec4 0, 0, 16;  Assign to sat16 (store_vec4_to_lval)
    %jmp T_10.57;
T_10.56 ;
    %load/vec4 v000002b865bb8f70_0;
    %parti/s 16, 0, 2;
    %ret/vec4 0, 0, 16;  Assign to sat16 (store_vec4_to_lval)
T_10.57 ;
T_10.55 ;
    %end;
S_000002b865bb47a0 .scope function.vec4.u32, "trunc_shift" "trunc_shift" 10 47, 10 47 0, S_000002b865bb5bf0;
 .timescale -9 -12;
v000002b865bba050_0 .var/i "sh", 31 0;
; Variable trunc_shift is vec4 return value of scope S_000002b865bb47a0
v000002b865bb7170_0 .var/s "val", 31 0;
TD_tb_top_receiver.u_top.u_fft2.trunc_shift ;
    %load/vec4 v000002b865bb7170_0;
    %load/vec4 v000002b865bba050_0;
    %ix/vec4 4;
    %shiftr/s 4;
    %ret/vec4 0, 0, 32;  Assign to trunc_shift (store_vec4_to_lval)
    %end;
S_000002b865bb5740 .scope function.vec4.u16, "tw_im" "tw_im" 10 69, 10 69 0, S_000002b865bb5bf0;
 .timescale -9 -12;
v000002b865bb6a90_0 .var/real "ang", 0 0;
v000002b865bb8570_0 .var/i "idx", 31 0;
v000002b865bb7f30_0 .var/real "s", 0 0;
; Variable tw_im is vec4 return value of scope S_000002b865bb5740
TD_tb_top_receiver.u_top.u_fft2.tw_im ;
    %pushi/real 1686629713, 20452; load=-6.28319
    %pushi/real 273688, 20430; load=-6.28319
    %add/wr;
    %load/vec4 v000002b865bb8570_0;
    %cvt/rv/s;
    %mul/wr;
    %pushi/real 1073741824, 4072; load=64.0000
    %div/wr;
    %store/real v000002b865bb6a90_0;
    %vpi_func/r 10 75 "$sin", v000002b865bb6a90_0 {0 0 0};
    %pushi/real 1073741824, 4077; load=2048.00
    %mul/wr;
    %store/real v000002b865bb7f30_0;
    %pushi/real 2147418112, 4080; load=32767.0
    %load/real v000002b865bb7f30_0;
    %cmp/wr;
    %jmp/0xz  T_12.58, 5;
    %pushi/vec4 32767, 0, 16;
    %ret/vec4 0, 0, 16;  Assign to tw_im (store_vec4_to_lval)
    %jmp T_12.59;
T_12.58 ;
    %load/real v000002b865bb7f30_0;
    %pushi/real 1073741824, 20465; load=-32768.0
    %cmp/wr;
    %jmp/0xz  T_12.60, 5;
    %pushi/vec4 32768, 0, 16;
    %ret/vec4 0, 0, 16;  Assign to tw_im (store_vec4_to_lval)
    %jmp T_12.61;
T_12.60 ;
    %vpi_func 10 78 "$rtoi" 32, v000002b865bb7f30_0 {0 0 0};
    %pad/s 16;
    %ret/vec4 0, 0, 16;  Assign to tw_im (store_vec4_to_lval)
T_12.61 ;
T_12.59 ;
    %end;
S_000002b865bb4610 .scope function.vec4.u16, "tw_re" "tw_re" 10 56, 10 56 0, S_000002b865bb5bf0;
 .timescale -9 -12;
v000002b865bb6810_0 .var/real "ang", 0 0;
v000002b865bb7670_0 .var/real "c", 0 0;
v000002b865bb7490_0 .var/i "idx", 31 0;
; Variable tw_re is vec4 return value of scope S_000002b865bb4610
TD_tb_top_receiver.u_top.u_fft2.tw_re ;
    %pushi/real 1686629713, 20452; load=-6.28319
    %pushi/real 273688, 20430; load=-6.28319
    %add/wr;
    %load/vec4 v000002b865bb7490_0;
    %cvt/rv/s;
    %mul/wr;
    %pushi/real 1073741824, 4072; load=64.0000
    %div/wr;
    %store/real v000002b865bb6810_0;
    %vpi_func/r 10 62 "$cos", v000002b865bb6810_0 {0 0 0};
    %pushi/real 1073741824, 4077; load=2048.00
    %mul/wr;
    %store/real v000002b865bb7670_0;
    %pushi/real 2147418112, 4080; load=32767.0
    %load/real v000002b865bb7670_0;
    %cmp/wr;
    %jmp/0xz  T_13.62, 5;
    %pushi/vec4 32767, 0, 16;
    %ret/vec4 0, 0, 16;  Assign to tw_re (store_vec4_to_lval)
    %jmp T_13.63;
T_13.62 ;
    %load/real v000002b865bb7670_0;
    %pushi/real 1073741824, 20465; load=-32768.0
    %cmp/wr;
    %jmp/0xz  T_13.64, 5;
    %pushi/vec4 32768, 0, 16;
    %ret/vec4 0, 0, 16;  Assign to tw_re (store_vec4_to_lval)
    %jmp T_13.65;
T_13.64 ;
    %vpi_func 10 65 "$rtoi" 32, v000002b865bb7670_0 {0 0 0};
    %pad/s 16;
    %ret/vec4 0, 0, 16;  Assign to tw_re (store_vec4_to_lval)
T_13.65 ;
T_13.63 ;
    %end;
S_000002b865bb5100 .scope module, "u_nco_ctrl" "nco_phase_ctrl" 3 57, 11 1 0, S_000002b865b33340;
 .timescale -9 -12;
    .port_info 0 /INPUT 1 "clk";
    .port_info 1 /INPUT 1 "rst_n";
    .port_info 2 /INPUT 1 "cfo_valid";
    .port_info 3 /INPUT 16 "cfo_eps_hat";
    .port_info 4 /INPUT 1 "phase_update_en";
    .port_info 5 /INPUT 1 "phase_err_valid";
    .port_info 6 /INPUT 16 "phase_err";
    .port_info 7 /OUTPUT 16 "phase_out";
    .port_info 8 /OUTPUT 16 "acc_tap";
P_000002b865680bf0 .param/l "PHASE_W" 0 11 2, +C4<00000000000000000000000000010000>;
P_000002b865680c28 .param/l "PI_NEG" 1 11 67, +C4<1110011011011110>;
P_000002b865680c60 .param/l "PI_POS" 1 11 66, +C4<0001100100100010>;
P_000002b865680c98 .param/l "TWO_PI" 1 11 68, +C4<0011001001000100>;
L_000002b865a29ff0 .functor BUFZ 16, v000002b865bb7990_0, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>;
v000002b865bb7990_0 .var/s "acc", 15 0;
v000002b865bb6bd0_0 .net/s "acc_tap", 15 0, L_000002b865a29ff0;  alias, 1 drivers
v000002b865bb7ad0_0 .net/s "cfo_eps_hat", 15 0, v000002b865ba8fe0_0;  alias, 1 drivers
v000002b865bb7530_0 .net "cfo_valid", 0 0, v000002b865ba89a0_0;  alias, 1 drivers
v000002b865bb8250_0 .net "clk", 0 0, v000002b865bcc9a0_0;  alias, 1 drivers
v000002b865bb66d0_0 .var/s "next_acc", 16 0;
v000002b865bb6b30_0 .net/s "phase_err", 15 0, v000002b865bb19f0_0;  alias, 1 drivers
v000002b865bb7b70_0 .net "phase_err_valid", 0 0, v000002b865bb1450_0;  alias, 1 drivers
v000002b865bb7cb0_0 .var/s "phase_inc", 15 0;
v000002b865bb7d50_0 .var/s "phase_out", 15 0;
v000002b865bb8890_0 .net "phase_update_en", 0 0, v000002b865bd0000_0;  alias, 1 drivers
v000002b865bb6f90_0 .net "rst_n", 0 0, v000002b865bcf1a0_0;  alias, 1 drivers
S_000002b865bb5f10 .scope module, "u_rot" "cfo_rotator" 3 73, 12 1 0, S_000002b865b33340;
 .timescale -9 -12;
    .port_info 0 /INPUT 1 "clk";
    .port_info 1 /INPUT 1 "rst_n";
    .port_info 2 /INPUT 1 "in_valid";
    .port_info 3 /INPUT 16 "in1_re";
    .port_info 4 /INPUT 16 "in1_im";
    .port_info 5 /INPUT 16 "in2_re";
    .port_info 6 /INPUT 16 "in2_im";
    .port_info 7 /INPUT 16 "phase";
    .port_info 8 /OUTPUT 1 "out_valid";
    .port_info 9 /OUTPUT 16 "out1_re";
    .port_info 10 /OUTPUT 16 "out1_im";
    .port_info 11 /OUTPUT 16 "out2_re";
    .port_info 12 /OUTPUT 16 "out2_im";
P_000002b865a39f00 .param/l "DATA_W" 0 12 2, +C4<00000000000000000000000000010000>;
P_000002b865a39f38 .param/l "PHASE_W" 0 12 3, +C4<00000000000000000000000000010000>;
v000002b865bbb680_0 .net "clk", 0 0, v000002b865bcc9a0_0;  alias, 1 drivers
v000002b865bbbfe0_0 .net/s "in1_im", 15 0, v000002b865bce0c0_0;  alias, 1 drivers
v000002b865bbb900_0 .net/s "in1_re", 15 0, v000002b865bce2a0_0;  alias, 1 drivers
v000002b865bbac80_0 .net/s "in2_im", 15 0, v000002b865bcea20_0;  alias, 1 drivers
v000002b865bbadc0_0 .net/s "in2_re", 15 0, v000002b865bcca40_0;  alias, 1 drivers
v000002b865bbc080_0 .net "in_valid", 0 0, v000002b865bd0000_0;  alias, 1 drivers
v000002b865bbbae0_0 .var/s "out1_im", 15 0;
v000002b865bbbf40_0 .var/s "out1_re", 15 0;
v000002b865bbc260_0 .var/s "out2_im", 15 0;
v000002b865bba820_0 .var/s "out2_re", 15 0;
v000002b865bbb720_0 .var "out_valid", 0 0;
v000002b865bba8c0_0 .net/s "phase", 15 0, v000002b865bb7d50_0;  alias, 1 drivers
v000002b865bbaaa0_0 .net/s "rot1_im", 15 0, v000002b865bbc6c0_0;  1 drivers
v000002b865bbb7c0_0 .net/s "rot1_re", 15 0, v000002b865bb8b10_0;  1 drivers
v000002b865bbab40_0 .net/s "rot2_im", 15 0, v000002b865bbba40_0;  1 drivers
v000002b865bbbea0_0 .net/s "rot2_re", 15 0, v000002b865bbaa00_0;  1 drivers
v000002b865bbc1c0_0 .net "rst_n", 0 0, v000002b865bcf1a0_0;  alias, 1 drivers
S_000002b865bb58d0 .scope module, "u_rot1" "cordic_rotator" 12 24, 8 1 0, S_000002b865bb5f10;
 .timescale -9 -12;
    .port_info 0 /INPUT 1 "clk";
    .port_info 1 /INPUT 1 "rst_n";
    .port_info 2 /INPUT 16 "x_in";
    .port_info 3 /INPUT 16 "y_in";
    .port_info 4 /INPUT 16 "theta_in";
    .port_info 5 /OUTPUT 16 "x_out";
    .port_info 6 /OUTPUT 16 "y_out";
P_000002b865ace1e0 .param/l "WIDTH" 0 8 2, +C4<00000000000000000000000000010000>;
v000002b865bb7e90_0 .net/s *"_ivl_37", 31 0, L_000002b865bd27b0;  1 drivers
L_000002b865c107d8 .functor BUFT 1, C4<00000000000000000000010011011011>, C4<0>, C4<0>, C4<0>;
v000002b865bb6c70_0 .net/2s *"_ivl_39", 31 0, L_000002b865c107d8;  1 drivers
v000002b865bb8110_0 .net/s *"_ivl_44", 31 0, L_000002b865bd1950;  1 drivers
L_000002b865c10820 .functor BUFT 1, C4<00000000000000000000010011011011>, C4<0>, C4<0>, C4<0>;
v000002b865bb6e50_0 .net/2s *"_ivl_46", 31 0, L_000002b865c10820;  1 drivers
L_000002b865c10478 .functor BUFT 1, C4<0000011001001000>, C4<0>, C4<0>, C4<0>;
v000002b865bb84d0 .array "atan_table", 11 0;
v000002b865bb84d0_0 .net/s v000002b865bb84d0 0, 15 0, L_000002b865c10478; 1 drivers
L_000002b865c104c0 .functor BUFT 1, C4<0000001110110101>, C4<0>, C4<0>, C4<0>;
v000002b865bb84d0_1 .net/s v000002b865bb84d0 1, 15 0, L_000002b865c104c0; 1 drivers
L_000002b865c10508 .functor BUFT 1, C4<0000000111110101>, C4<0>, C4<0>, C4<0>;
v000002b865bb84d0_2 .net/s v000002b865bb84d0 2, 15 0, L_000002b865c10508; 1 drivers
L_000002b865c10550 .functor BUFT 1, C4<0000000011111110>, C4<0>, C4<0>, C4<0>;
v000002b865bb84d0_3 .net/s v000002b865bb84d0 3, 15 0, L_000002b865c10550; 1 drivers
L_000002b865c10598 .functor BUFT 1, C4<0000000001111111>, C4<0>, C4<0>, C4<0>;
v000002b865bb84d0_4 .net/s v000002b865bb84d0 4, 15 0, L_000002b865c10598; 1 drivers
L_000002b865c105e0 .functor BUFT 1, C4<0000000000111111>, C4<0>, C4<0>, C4<0>;
v000002b865bb84d0_5 .net/s v000002b865bb84d0 5, 15 0, L_000002b865c105e0; 1 drivers
L_000002b865c10628 .functor BUFT 1, C4<0000000000011111>, C4<0>, C4<0>, C4<0>;
v000002b865bb84d0_6 .net/s v000002b865bb84d0 6, 15 0, L_000002b865c10628; 1 drivers
L_000002b865c10670 .functor BUFT 1, C4<0000000000001111>, C4<0>, C4<0>, C4<0>;
v000002b865bb84d0_7 .net/s v000002b865bb84d0 7, 15 0, L_000002b865c10670; 1 drivers
L_000002b865c106b8 .functor BUFT 1, C4<0000000000000111>, C4<0>, C4<0>, C4<0>;
v000002b865bb84d0_8 .net/s v000002b865bb84d0 8, 15 0, L_000002b865c106b8; 1 drivers
L_000002b865c10700 .functor BUFT 1, C4<0000000000000011>, C4<0>, C4<0>, C4<0>;
v000002b865bb84d0_9 .net/s v000002b865bb84d0 9, 15 0, L_000002b865c10700; 1 drivers
L_000002b865c10748 .functor BUFT 1, C4<0000000000000001>, C4<0>, C4<0>, C4<0>;
v000002b865bb84d0_10 .net/s v000002b865bb84d0 10, 15 0, L_000002b865c10748; 1 drivers
L_000002b865c10790 .functor BUFT 1, C4<0000000000000000>, C4<0>, C4<0>, C4<0>;
v000002b865bb84d0_11 .net/s v000002b865bb84d0 11, 15 0, L_000002b865c10790; 1 drivers
o000002b865b5aa68 .functor BUFZ 1, C4<z>; HiZ drive
v000002b865bb8610_0 .net "clk", 0 0, o000002b865b5aa68;  0 drivers
v000002b865bb7030_0 .var/i "i", 31 0;
o000002b865b5aac8 .functor BUFZ 1, C4<z>; HiZ drive
v000002b865bb6770_0 .net "rst_n", 0 0, o000002b865b5aac8;  0 drivers
v000002b865bb82f0_0 .net/s "theta_in", 15 0, v000002b865bb7d50_0;  alias, 1 drivers
v000002b865bb89d0 .array/s "x", 12 0, 15 0;
v000002b865bb8390_0 .net/s "x_in", 15 0, v000002b865bce2a0_0;  alias, 1 drivers
v000002b865bb8b10_0 .var/s "x_out", 15 0;
v000002b865bb8430_0 .net/s "x_scaled", 31 0, L_000002b865bd1db0;  1 drivers
v000002b865bb70d0 .array/s "y", 12 0, 15 0;
v000002b865bba640_0 .net/s "y_in", 15 0, v000002b865bce0c0_0;  alias, 1 drivers
v000002b865bbc6c0_0 .var/s "y_out", 15 0;
v000002b865bbbe00_0 .net/s "y_scaled", 31 0, L_000002b865bd1a90;  1 drivers
v000002b865bbcc60 .array/s "z", 12 0, 15 0;
E_000002b865acf120 .event anyedge, v000002b865bb8430_0, v000002b865bbbe00_0;
v000002b865bbcc60_0 .array/port v000002b865bbcc60, 0;
E_000002b865acf5a0/0 .event anyedge, v000002b865ba8180_0, v000002b865ba80e0_0, v000002b865bb7d50_0, v000002b865bbcc60_0;
v000002b865bbcc60_1 .array/port v000002b865bbcc60, 1;
v000002b865bbcc60_2 .array/port v000002b865bbcc60, 2;
v000002b865bbcc60_3 .array/port v000002b865bbcc60, 3;
v000002b865bbcc60_4 .array/port v000002b865bbcc60, 4;
E_000002b865acf5a0/1 .event anyedge, v000002b865bbcc60_1, v000002b865bbcc60_2, v000002b865bbcc60_3, v000002b865bbcc60_4;
v000002b865bbcc60_5 .array/port v000002b865bbcc60, 5;
v000002b865bbcc60_6 .array/port v000002b865bbcc60, 6;
v000002b865bbcc60_7 .array/port v000002b865bbcc60, 7;
v000002b865bbcc60_8 .array/port v000002b865bbcc60, 8;
E_000002b865acf5a0/2 .event anyedge, v000002b865bbcc60_5, v000002b865bbcc60_6, v000002b865bbcc60_7, v000002b865bbcc60_8;
v000002b865bbcc60_9 .array/port v000002b865bbcc60, 9;
v000002b865bbcc60_10 .array/port v000002b865bbcc60, 10;
v000002b865bbcc60_11 .array/port v000002b865bbcc60, 11;
v000002b865bbcc60_12 .array/port v000002b865bbcc60, 12;
E_000002b865acf5a0/3 .event anyedge, v000002b865bbcc60_9, v000002b865bbcc60_10, v000002b865bbcc60_11, v000002b865bbcc60_12;
v000002b865bb89d0_0 .array/port v000002b865bb89d0, 0;
v000002b865bb89d0_1 .array/port v000002b865bb89d0, 1;
v000002b865bb89d0_2 .array/port v000002b865bb89d0, 2;
v000002b865bb89d0_3 .array/port v000002b865bb89d0, 3;
E_000002b865acf5a0/4 .event anyedge, v000002b865bb89d0_0, v000002b865bb89d0_1, v000002b865bb89d0_2, v000002b865bb89d0_3;
v000002b865bb89d0_4 .array/port v000002b865bb89d0, 4;
v000002b865bb89d0_5 .array/port v000002b865bb89d0, 5;
v000002b865bb89d0_6 .array/port v000002b865bb89d0, 6;
v000002b865bb89d0_7 .array/port v000002b865bb89d0, 7;
E_000002b865acf5a0/5 .event anyedge, v000002b865bb89d0_4, v000002b865bb89d0_5, v000002b865bb89d0_6, v000002b865bb89d0_7;
v000002b865bb89d0_8 .array/port v000002b865bb89d0, 8;
v000002b865bb89d0_9 .array/port v000002b865bb89d0, 9;
v000002b865bb89d0_10 .array/port v000002b865bb89d0, 10;
v000002b865bb89d0_11 .array/port v000002b865bb89d0, 11;
E_000002b865acf5a0/6 .event anyedge, v000002b865bb89d0_8, v000002b865bb89d0_9, v000002b865bb89d0_10, v000002b865bb89d0_11;
v000002b865bb89d0_12 .array/port v000002b865bb89d0, 12;
v000002b865bb70d0_0 .array/port v000002b865bb70d0, 0;
v000002b865bb70d0_1 .array/port v000002b865bb70d0, 1;
v000002b865bb70d0_2 .array/port v000002b865bb70d0, 2;
E_000002b865acf5a0/7 .event anyedge, v000002b865bb89d0_12, v000002b865bb70d0_0, v000002b865bb70d0_1, v000002b865bb70d0_2;
v000002b865bb70d0_3 .array/port v000002b865bb70d0, 3;
v000002b865bb70d0_4 .array/port v000002b865bb70d0, 4;
v000002b865bb70d0_5 .array/port v000002b865bb70d0, 5;
v000002b865bb70d0_6 .array/port v000002b865bb70d0, 6;
E_000002b865acf5a0/8 .event anyedge, v000002b865bb70d0_3, v000002b865bb70d0_4, v000002b865bb70d0_5, v000002b865bb70d0_6;
v000002b865bb70d0_7 .array/port v000002b865bb70d0, 7;
v000002b865bb70d0_8 .array/port v000002b865bb70d0, 8;
v000002b865bb70d0_9 .array/port v000002b865bb70d0, 9;
v000002b865bb70d0_10 .array/port v000002b865bb70d0, 10;
E_000002b865acf5a0/9 .event anyedge, v000002b865bb70d0_7, v000002b865bb70d0_8, v000002b865bb70d0_9, v000002b865bb70d0_10;
v000002b865bb70d0_11 .array/port v000002b865bb70d0, 11;
v000002b865bb70d0_12 .array/port v000002b865bb70d0, 12;
E_000002b865acf5a0/10 .event anyedge, v000002b865bb70d0_11, v000002b865bb70d0_12, v000002b865bb84d0_0, v000002b865bb84d0_1;
E_000002b865acf5a0/11 .event anyedge, v000002b865bb84d0_2, v000002b865bb84d0_3, v000002b865bb84d0_4, v000002b865bb84d0_5;
E_000002b865acf5a0/12 .event anyedge, v000002b865bb84d0_6, v000002b865bb84d0_7, v000002b865bb84d0_8, v000002b865bb84d0_9;
E_000002b865acf5a0/13 .event anyedge, v000002b865bb84d0_10, v000002b865bb84d0_11;
E_000002b865acf5a0 .event/or E_000002b865acf5a0/0, E_000002b865acf5a0/1, E_000002b865acf5a0/2, E_000002b865acf5a0/3, E_000002b865acf5a0/4, E_000002b865acf5a0/5, E_000002b865acf5a0/6, E_000002b865acf5a0/7, E_000002b865acf5a0/8, E_000002b865acf5a0/9, E_000002b865acf5a0/10, E_000002b865acf5a0/11, E_000002b865acf5a0/12, E_000002b865acf5a0/13;
L_000002b865bd27b0 .extend/s 32, v000002b865bb89d0_12;
L_000002b865bd1db0 .arith/mult 32, L_000002b865bd27b0, L_000002b865c107d8;
L_000002b865bd1950 .extend/s 32, v000002b865bb70d0_12;
L_000002b865bd1a90 .arith/mult 32, L_000002b865bd1950, L_000002b865c10820;
S_000002b865bb4c50 .scope module, "u_rot2" "cordic_rotator" 12 29, 8 1 0, S_000002b865bb5f10;
 .timescale -9 -12;
    .port_info 0 /INPUT 1 "clk";
    .port_info 1 /INPUT 1 "rst_n";
    .port_info 2 /INPUT 16 "x_in";
    .port_info 3 /INPUT 16 "y_in";
    .port_info 4 /INPUT 16 "theta_in";
    .port_info 5 /OUTPUT 16 "x_out";
    .port_info 6 /OUTPUT 16 "y_out";
P_000002b865acf860 .param/l "WIDTH" 0 8 2, +C4<00000000000000000000000000010000>;
v000002b865bbb5e0_0 .net/s *"_ivl_37", 31 0, L_000002b865bd1ef0;  1 drivers
L_000002b865c10bc8 .functor BUFT 1, C4<00000000000000000000010011011011>, C4<0>, C4<0>, C4<0>;
v000002b865bbabe0_0 .net/2s *"_ivl_39", 31 0, L_000002b865c10bc8;  1 drivers
v000002b865bbc760_0 .net/s *"_ivl_44", 31 0, L_000002b865bd2a30;  1 drivers
L_000002b865c10c10 .functor BUFT 1, C4<00000000000000000000010011011011>, C4<0>, C4<0>, C4<0>;
v000002b865bbb220_0 .net/2s *"_ivl_46", 31 0, L_000002b865c10c10;  1 drivers
L_000002b865c10868 .functor BUFT 1, C4<0000011001001000>, C4<0>, C4<0>, C4<0>;
v000002b865bbb9a0 .array "atan_table", 11 0;
v000002b865bbb9a0_0 .net/s v000002b865bbb9a0 0, 15 0, L_000002b865c10868; 1 drivers
L_000002b865c108b0 .functor BUFT 1, C4<0000001110110101>, C4<0>, C4<0>, C4<0>;
v000002b865bbb9a0_1 .net/s v000002b865bbb9a0 1, 15 0, L_000002b865c108b0; 1 drivers
L_000002b865c108f8 .functor BUFT 1, C4<0000000111110101>, C4<0>, C4<0>, C4<0>;
v000002b865bbb9a0_2 .net/s v000002b865bbb9a0 2, 15 0, L_000002b865c108f8; 1 drivers
L_000002b865c10940 .functor BUFT 1, C4<0000000011111110>, C4<0>, C4<0>, C4<0>;
v000002b865bbb9a0_3 .net/s v000002b865bbb9a0 3, 15 0, L_000002b865c10940; 1 drivers
L_000002b865c10988 .functor BUFT 1, C4<0000000001111111>, C4<0>, C4<0>, C4<0>;
v000002b865bbb9a0_4 .net/s v000002b865bbb9a0 4, 15 0, L_000002b865c10988; 1 drivers
L_000002b865c109d0 .functor BUFT 1, C4<0000000000111111>, C4<0>, C4<0>, C4<0>;
v000002b865bbb9a0_5 .net/s v000002b865bbb9a0 5, 15 0, L_000002b865c109d0; 1 drivers
L_000002b865c10a18 .functor BUFT 1, C4<0000000000011111>, C4<0>, C4<0>, C4<0>;
v000002b865bbb9a0_6 .net/s v000002b865bbb9a0 6, 15 0, L_000002b865c10a18; 1 drivers
L_000002b865c10a60 .functor BUFT 1, C4<0000000000001111>, C4<0>, C4<0>, C4<0>;
v000002b865bbb9a0_7 .net/s v000002b865bbb9a0 7, 15 0, L_000002b865c10a60; 1 drivers
L_000002b865c10aa8 .functor BUFT 1, C4<0000000000000111>, C4<0>, C4<0>, C4<0>;
v000002b865bbb9a0_8 .net/s v000002b865bbb9a0 8, 15 0, L_000002b865c10aa8; 1 drivers
L_000002b865c10af0 .functor BUFT 1, C4<0000000000000011>, C4<0>, C4<0>, C4<0>;
v000002b865bbb9a0_9 .net/s v000002b865bbb9a0 9, 15 0, L_000002b865c10af0; 1 drivers
L_000002b865c10b38 .functor BUFT 1, C4<0000000000000001>, C4<0>, C4<0>, C4<0>;
v000002b865bbb9a0_10 .net/s v000002b865bbb9a0 10, 15 0, L_000002b865c10b38; 1 drivers
L_000002b865c10b80 .functor BUFT 1, C4<0000000000000000>, C4<0>, C4<0>, C4<0>;
v000002b865bbb9a0_11 .net/s v000002b865bbb9a0 11, 15 0, L_000002b865c10b80; 1 drivers
o000002b865b5b758 .functor BUFZ 1, C4<z>; HiZ drive
v000002b865bbbd60_0 .net "clk", 0 0, o000002b865b5b758;  0 drivers
v000002b865bbc3a0_0 .var/i "i", 31 0;
o000002b865b5b7b8 .functor BUFZ 1, C4<z>; HiZ drive
v000002b865bba6e0_0 .net "rst_n", 0 0, o000002b865b5b7b8;  0 drivers
v000002b865bbc800_0 .net/s "theta_in", 15 0, v000002b865bb7d50_0;  alias, 1 drivers
v000002b865bbb860 .array/s "x", 12 0, 15 0;
v000002b865bbcd00_0 .net/s "x_in", 15 0, v000002b865bcca40_0;  alias, 1 drivers
v000002b865bbaa00_0 .var/s "x_out", 15 0;
v000002b865bbbb80_0 .net/s "x_scaled", 31 0, L_000002b865bd2990;  1 drivers
v000002b865bbb400 .array/s "y", 12 0, 15 0;
v000002b865bbc120_0 .net/s "y_in", 15 0, v000002b865bcea20_0;  alias, 1 drivers
v000002b865bbba40_0 .var/s "y_out", 15 0;
v000002b865bbb0e0_0 .net/s "y_scaled", 31 0, L_000002b865bd2df0;  1 drivers
v000002b865bba780 .array/s "z", 12 0, 15 0;
E_000002b865acf1a0 .event anyedge, v000002b865bbbb80_0, v000002b865bbb0e0_0;
v000002b865bba780_0 .array/port v000002b865bba780, 0;
E_000002b865acef60/0 .event anyedge, v000002b865ba87c0_0, v000002b865ba8400_0, v000002b865bb7d50_0, v000002b865bba780_0;
v000002b865bba780_1 .array/port v000002b865bba780, 1;
v000002b865bba780_2 .array/port v000002b865bba780, 2;
v000002b865bba780_3 .array/port v000002b865bba780, 3;
v000002b865bba780_4 .array/port v000002b865bba780, 4;
E_000002b865acef60/1 .event anyedge, v000002b865bba780_1, v000002b865bba780_2, v000002b865bba780_3, v000002b865bba780_4;
v000002b865bba780_5 .array/port v000002b865bba780, 5;
v000002b865bba780_6 .array/port v000002b865bba780, 6;
v000002b865bba780_7 .array/port v000002b865bba780, 7;
v000002b865bba780_8 .array/port v000002b865bba780, 8;
E_000002b865acef60/2 .event anyedge, v000002b865bba780_5, v000002b865bba780_6, v000002b865bba780_7, v000002b865bba780_8;
v000002b865bba780_9 .array/port v000002b865bba780, 9;
v000002b865bba780_10 .array/port v000002b865bba780, 10;
v000002b865bba780_11 .array/port v000002b865bba780, 11;
v000002b865bba780_12 .array/port v000002b865bba780, 12;
E_000002b865acef60/3 .event anyedge, v000002b865bba780_9, v000002b865bba780_10, v000002b865bba780_11, v000002b865bba780_12;
v000002b865bbb860_0 .array/port v000002b865bbb860, 0;
v000002b865bbb860_1 .array/port v000002b865bbb860, 1;
v000002b865bbb860_2 .array/port v000002b865bbb860, 2;
v000002b865bbb860_3 .array/port v000002b865bbb860, 3;
E_000002b865acef60/4 .event anyedge, v000002b865bbb860_0, v000002b865bbb860_1, v000002b865bbb860_2, v000002b865bbb860_3;
v000002b865bbb860_4 .array/port v000002b865bbb860, 4;
v000002b865bbb860_5 .array/port v000002b865bbb860, 5;
v000002b865bbb860_6 .array/port v000002b865bbb860, 6;
v000002b865bbb860_7 .array/port v000002b865bbb860, 7;
E_000002b865acef60/5 .event anyedge, v000002b865bbb860_4, v000002b865bbb860_5, v000002b865bbb860_6, v000002b865bbb860_7;
v000002b865bbb860_8 .array/port v000002b865bbb860, 8;
v000002b865bbb860_9 .array/port v000002b865bbb860, 9;
v000002b865bbb860_10 .array/port v000002b865bbb860, 10;
v000002b865bbb860_11 .array/port v000002b865bbb860, 11;
E_000002b865acef60/6 .event anyedge, v000002b865bbb860_8, v000002b865bbb860_9, v000002b865bbb860_10, v000002b865bbb860_11;
v000002b865bbb860_12 .array/port v000002b865bbb860, 12;
v000002b865bbb400_0 .array/port v000002b865bbb400, 0;
v000002b865bbb400_1 .array/port v000002b865bbb400, 1;
v000002b865bbb400_2 .array/port v000002b865bbb400, 2;
E_000002b865acef60/7 .event anyedge, v000002b865bbb860_12, v000002b865bbb400_0, v000002b865bbb400_1, v000002b865bbb400_2;
v000002b865bbb400_3 .array/port v000002b865bbb400, 3;
v000002b865bbb400_4 .array/port v000002b865bbb400, 4;
v000002b865bbb400_5 .array/port v000002b865bbb400, 5;
v000002b865bbb400_6 .array/port v000002b865bbb400, 6;
E_000002b865acef60/8 .event anyedge, v000002b865bbb400_3, v000002b865bbb400_4, v000002b865bbb400_5, v000002b865bbb400_6;
v000002b865bbb400_7 .array/port v000002b865bbb400, 7;
v000002b865bbb400_8 .array/port v000002b865bbb400, 8;
v000002b865bbb400_9 .array/port v000002b865bbb400, 9;
v000002b865bbb400_10 .array/port v000002b865bbb400, 10;
E_000002b865acef60/9 .event anyedge, v000002b865bbb400_7, v000002b865bbb400_8, v000002b865bbb400_9, v000002b865bbb400_10;
v000002b865bbb400_11 .array/port v000002b865bbb400, 11;
v000002b865bbb400_12 .array/port v000002b865bbb400, 12;
E_000002b865acef60/10 .event anyedge, v000002b865bbb400_11, v000002b865bbb400_12, v000002b865bbb9a0_0, v000002b865bbb9a0_1;
E_000002b865acef60/11 .event anyedge, v000002b865bbb9a0_2, v000002b865bbb9a0_3, v000002b865bbb9a0_4, v000002b865bbb9a0_5;
E_000002b865acef60/12 .event anyedge, v000002b865bbb9a0_6, v000002b865bbb9a0_7, v000002b865bbb9a0_8, v000002b865bbb9a0_9;
E_000002b865acef60/13 .event anyedge, v000002b865bbb9a0_10, v000002b865bbb9a0_11;
E_000002b865acef60 .event/or E_000002b865acef60/0, E_000002b865acef60/1, E_000002b865acef60/2, E_000002b865acef60/3, E_000002b865acef60/4, E_000002b865acef60/5, E_000002b865acef60/6, E_000002b865acef60/7, E_000002b865acef60/8, E_000002b865acef60/9, E_000002b865acef60/10, E_000002b865acef60/11, E_000002b865acef60/12, E_000002b865acef60/13;
L_000002b865bd1ef0 .extend/s 32, v000002b865bbb860_12;
L_000002b865bd2990 .arith/mult 32, L_000002b865bd1ef0, L_000002b865c10bc8;
L_000002b865bd2a30 .extend/s 32, v000002b865bbb400_12;
L_000002b865bd2df0 .arith/mult 32, L_000002b865bd2a30, L_000002b865c10c10;
S_000002b865bb5a60 .scope module, "u_zf" "mimo_zf_2x2" 3 191, 13 1 0, S_000002b865b33340;
 .timescale -9 -12;
    .port_info 0 /INPUT 1 "clk";
    .port_info 1 /INPUT 1 "rst_n";
    .port_info 2 /INPUT 1 "in_valid";
    .port_info 3 /INPUT 16 "Y1_re";
    .port_info 4 /INPUT 16 "Y1_im";
    .port_info 5 /INPUT 16 "Y2_re";
    .port_info 6 /INPUT 16 "Y2_im";
    .port_info 7 /INPUT 16 "h00_re";
    .port_info 8 /INPUT 16 "h00_im";
    .port_info 9 /INPUT 16 "h01_re";
    .port_info 10 /INPUT 16 "h01_im";
    .port_info 11 /INPUT 16 "h10_re";
    .port_info 12 /INPUT 16 "h10_im";
    .port_info 13 /INPUT 16 "h11_re";
    .port_info 14 /INPUT 16 "h11_im";
    .port_info 15 /OUTPUT 1 "out_valid";
    .port_info 16 /OUTPUT 16 "X1_re";
    .port_info 17 /OUTPUT 16 "X1_im";
    .port_info 18 /OUTPUT 16 "X2_re";
    .port_info 19 /OUTPUT 16 "X2_im";
P_000002b865a39f80 .param/l "DATA_W" 0 13 2, +C4<00000000000000000000000000010000>;
P_000002b865a39fb8 .param/l "FRAC" 0 13 3, +C4<00000000000000000000000000001011>;
v000002b865bc9bb0_0 .var/s "X1_im", 15 0;
v000002b865bc9390_0 .var/s "X1_re", 15 0;
v000002b865bc9f70_0 .var/s "X2_im", 15 0;
v000002b865bca5b0_0 .var/s "X2_re", 15 0;
v000002b865bc9430_0 .net/s "Y1_im", 15 0, v000002b865bcd760_0;  1 drivers
v000002b865bc9570_0 .net/s "Y1_re", 15 0, v000002b865bcda80_0;  1 drivers
v000002b865bc96b0_0 .net/s "Y2_im", 15 0, v000002b865bcd080_0;  1 drivers
v000002b865bc9a70_0 .net/s "Y2_re", 15 0, v000002b865bccb80_0;  1 drivers
v000002b865bcc4f0_0 .net "clk", 0 0, v000002b865bcc9a0_0;  alias, 1 drivers
v000002b865bcc130_0 .net/s "h00_im", 15 0, v000002b865bcf420_0;  alias, 1 drivers
v000002b865bcb410_0 .net/s "h00_re", 15 0, v000002b865bcf6a0_0;  alias, 1 drivers
v000002b865bcbb90_0 .net/s "h01_im", 15 0, v000002b865bcfec0_0;  alias, 1 drivers
v000002b865bcc270_0 .net/s "h01_re", 15 0, v000002b865bd0280_0;  alias, 1 drivers
v000002b865bcb730_0 .net/s "h10_im", 15 0, v000002b865bcf740_0;  alias, 1 drivers
v000002b865bcba50_0 .net/s "h10_re", 15 0, v000002b865bcf7e0_0;  alias, 1 drivers
v000002b865bcb7d0_0 .net/s "h11_im", 15 0, v000002b865bcf240_0;  alias, 1 drivers
v000002b865bcb550_0 .net/s "h11_re", 15 0, v000002b865bcf380_0;  alias, 1 drivers
v000002b865bcb2d0_0 .net "in_valid", 0 0, v000002b865bcdbc0_0;  1 drivers
v000002b865bcb910_0 .var "out_valid", 0 0;
v000002b865bcb9b0_0 .net/s "p00_im", 15 0, v000002b865bbd2a0_0;  1 drivers
v000002b865bcb0f0_0 .net/s "p00_re", 15 0, v000002b865bbe060_0;  1 drivers
v000002b865bcc310_0 .net/s "p01_im", 15 0, v000002b865bbd700_0;  1 drivers
v000002b865bcbaf0_0 .net/s "p01_re", 15 0, v000002b865bbcee0_0;  1 drivers
v000002b865bcc3b0_0 .net/s "p10_im", 15 0, v000002b865bca3d0_0;  1 drivers
v000002b865bcb050_0 .net/s "p10_re", 15 0, v000002b865bc9610_0;  1 drivers
v000002b865bcb190_0 .net/s "p11_im", 15 0, v000002b865bc8e90_0;  1 drivers
v000002b865bcb230_0 .net/s "p11_re", 15 0, v000002b865bc9c50_0;  1 drivers
v000002b865bcb370_0 .net "rst_n", 0 0, v000002b865bcf1a0_0;  alias, 1 drivers
S_000002b865bb5420 .scope function.vec4.u16, "sat_add" "sat_add" 13 72, 13 72 0, S_000002b865bb5a60;
 .timescale -9 -12;
v000002b865bba960_0 .var/s "a", 15 0;
v000002b865bbc4e0_0 .var/s "b", 15 0;
v000002b865bbc300_0 .var/s "max_limit", 16 0;
v000002b865bbad20_0 .var/s "min_limit", 16 0;
; Variable sat_add is vec4 return value of scope S_000002b865bb5420
v000002b865bbbc20_0 .var/s "sum", 16 0;
TD_tb_top_receiver.u_top.u_zf.sat_add ;
    %load/vec4 v000002b865bba960_0;
    %pad/s 17;
    %load/vec4 v000002b865bbc4e0_0;
    %pad/s 17;
    %add;
    %store/vec4 v000002b865bbbc20_0, 0, 17;
    %pushi/vec4 32767, 0, 17;
    %store/vec4 v000002b865bbc300_0, 0, 17;
    %pushi/vec4 98304, 0, 17;
    %store/vec4 v000002b865bbad20_0, 0, 17;
    %load/vec4 v000002b865bbc300_0;
    %load/vec4 v000002b865bbbc20_0;
    %cmp/s;
    %jmp/0xz  T_14.66, 5;
    %load/vec4 v000002b865bbc300_0;
    %parti/s 16, 0, 2;
    %ret/vec4 0, 0, 16;  Assign to sat_add (store_vec4_to_lval)
    %jmp T_14.67;
T_14.66 ;
    %load/vec4 v000002b865bbbc20_0;
    %load/vec4 v000002b865bbad20_0;
    %cmp/s;
    %jmp/0xz  T_14.68, 5;
    %load/vec4 v000002b865bbad20_0;
    %parti/s 16, 0, 2;
    %ret/vec4 0, 0, 16;  Assign to sat_add (store_vec4_to_lval)
    %jmp T_14.69;
T_14.68 ;
    %load/vec4 v000002b865bbbc20_0;
    %parti/s 16, 0, 2;
    %ret/vec4 0, 0, 16;  Assign to sat_add (store_vec4_to_lval)
T_14.69 ;
T_14.67 ;
    %end;
S_000002b865bb60a0 .scope module, "u_mul_00" "complex_mult" 13 46, 5 1 0, S_000002b865bb5a60;
 .timescale -9 -12;
    .port_info 0 /INPUT 16 "a_re";
    .port_info 1 /INPUT 16 "a_im";
    .port_info 2 /INPUT 16 "b_re";
    .port_info 3 /INPUT 16 "b_im";
    .port_info 4 /OUTPUT 16 "p_re";
    .port_info 5 /OUTPUT 16 "p_im";
P_000002b865a19030 .param/l "FRAC" 0 5 3, +C4<00000000000000000000000000001011>;
P_000002b865a19068 .param/l "MAX_VAL" 1 5 28, +C4<0111111111111111>;
P_000002b865a190a0 .param/l "MIN_VAL" 1 5 29, +C4<1000000000000000>;
P_000002b865a190d8 .param/l "WIDTH" 0 5 2, +C4<00000000000000000000000000010000>;
v000002b865bbc440_0 .net/s *"_ivl_0", 31 0, L_000002b865bd3a70;  1 drivers
v000002b865bbbcc0_0 .net/s *"_ivl_12", 31 0, L_000002b865bd4470;  1 drivers
v000002b865bbaf00_0 .net/s *"_ivl_14", 31 0, L_000002b865bd4830;  1 drivers
v000002b865bbc8a0_0 .net/s *"_ivl_18", 31 0, L_000002b865bd4a10;  1 drivers
v000002b865bbafa0_0 .net/s *"_ivl_2", 31 0, L_000002b865bd3d90;  1 drivers
v000002b865bbc580_0 .net/s *"_ivl_20", 31 0, L_000002b865bd34d0;  1 drivers
v000002b865bbc940_0 .net/s *"_ivl_24", 32 0, L_000002b865bd32f0;  1 drivers
v000002b865bbc620_0 .net/s *"_ivl_26", 32 0, L_000002b865bd45b0;  1 drivers
v000002b865bbb040_0 .net/s *"_ivl_30", 32 0, L_000002b865bd4c90;  1 drivers
v000002b865bbb180_0 .net/s *"_ivl_32", 32 0, L_000002b865bd5370;  1 drivers
v000002b865bbc9e0_0 .net *"_ivl_38", 21 0, L_000002b865bd3cf0;  1 drivers
v000002b865bbca80_0 .net *"_ivl_42", 21 0, L_000002b865bd3e30;  1 drivers
v000002b865bbcb20_0 .net/s *"_ivl_6", 31 0, L_000002b865bd3b10;  1 drivers
v000002b865bbb4a0_0 .net/s *"_ivl_8", 31 0, L_000002b865bd36b0;  1 drivers
v000002b865bbb2c0_0 .net/s "a_im", 15 0, v000002b865bcf420_0;  alias, 1 drivers
v000002b865bbb360_0 .net/s "a_re", 15 0, v000002b865bcf6a0_0;  alias, 1 drivers
v000002b865bbcbc0_0 .net/s "ac", 31 0, L_000002b865bd4650;  1 drivers
v000002b865bbcda0_0 .net/s "ad", 31 0, L_000002b865bd4bf0;  1 drivers
v000002b865bbb540_0 .net/s "b_im", 15 0, v000002b865bcd760_0;  alias, 1 drivers
v000002b865bbd480_0 .net/s "b_re", 15 0, v000002b865bcda80_0;  alias, 1 drivers
v000002b865bbe380_0 .net/s "bc", 31 0, L_000002b865bd4ab0;  1 drivers
v000002b865bbdd40_0 .net/s "bd", 31 0, L_000002b865bd4150;  1 drivers
v000002b865bbd660_0 .net/s "im_long", 32 0, L_000002b865bd2e90;  1 drivers
v000002b865bbd5c0_0 .net/s "im_shifted", 32 0, L_000002b865bd37f0;  1 drivers
v000002b865bbd2a0_0 .var/s "p_im", 15 0;
v000002b865bbe060_0 .var/s "p_re", 15 0;
v000002b865bbe100_0 .net/s "re_long", 32 0, L_000002b865bd5230;  1 drivers
v000002b865bbdde0_0 .net/s "re_shifted", 32 0, L_000002b865bd5190;  1 drivers
E_000002b865acec20 .event anyedge, v000002b865bbdde0_0, v000002b865bbd5c0_0;
L_000002b865bd3a70 .extend/s 32, v000002b865bcf6a0_0;
L_000002b865bd3d90 .extend/s 32, v000002b865bcda80_0;
L_000002b865bd4650 .arith/mult 32, L_000002b865bd3a70, L_000002b865bd3d90;
L_000002b865bd3b10 .extend/s 32, v000002b865bcf420_0;
L_000002b865bd36b0 .extend/s 32, v000002b865bcd760_0;
L_000002b865bd4150 .arith/mult 32, L_000002b865bd3b10, L_000002b865bd36b0;
L_000002b865bd4470 .extend/s 32, v000002b865bcf6a0_0;
L_000002b865bd4830 .extend/s 32, v000002b865bcd760_0;
L_000002b865bd4bf0 .arith/mult 32, L_000002b865bd4470, L_000002b865bd4830;
L_000002b865bd4a10 .extend/s 32, v000002b865bcf420_0;
L_000002b865bd34d0 .extend/s 32, v000002b865bcda80_0;
L_000002b865bd4ab0 .arith/mult 32, L_000002b865bd4a10, L_000002b865bd34d0;
L_000002b865bd32f0 .extend/s 33, L_000002b865bd4650;
L_000002b865bd45b0 .extend/s 33, L_000002b865bd4150;
L_000002b865bd5230 .arith/sub 33, L_000002b865bd32f0, L_000002b865bd45b0;
L_000002b865bd4c90 .extend/s 33, L_000002b865bd4bf0;
L_000002b865bd5370 .extend/s 33, L_000002b865bd4ab0;
L_000002b865bd2e90 .arith/sum 33, L_000002b865bd4c90, L_000002b865bd5370;
L_000002b865bd3cf0 .part L_000002b865bd5230, 11, 22;
L_000002b865bd5190 .extend/s 33, L_000002b865bd3cf0;
L_000002b865bd3e30 .part L_000002b865bd2e90, 11, 22;
L_000002b865bd37f0 .extend/s 33, L_000002b865bd3e30;
S_000002b865bb4de0 .scope module, "u_mul_01" "complex_mult" 13 51, 5 1 0, S_000002b865bb5a60;
 .timescale -9 -12;
    .port_info 0 /INPUT 16 "a_re";
    .port_info 1 /INPUT 16 "a_im";
    .port_info 2 /INPUT 16 "b_re";
    .port_info 3 /INPUT 16 "b_im";
    .port_info 4 /OUTPUT 16 "p_re";
    .port_info 5 /OUTPUT 16 "p_im";
P_000002b865a215b0 .param/l "FRAC" 0 5 3, +C4<00000000000000000000000000001011>;
P_000002b865a215e8 .param/l "MAX_VAL" 1 5 28, +C4<0111111111111111>;
P_000002b865a21620 .param/l "MIN_VAL" 1 5 29, +C4<1000000000000000>;
P_000002b865a21658 .param/l "WIDTH" 0 5 2, +C4<00000000000000000000000000010000>;
v000002b865bbda20_0 .net/s *"_ivl_0", 31 0, L_000002b865bd46f0;  1 drivers
v000002b865bbcf80_0 .net/s *"_ivl_12", 31 0, L_000002b865bd2f30;  1 drivers
v000002b865bbd840_0 .net/s *"_ivl_14", 31 0, L_000002b865bd4d30;  1 drivers
v000002b865bbd8e0_0 .net/s *"_ivl_18", 31 0, L_000002b865bd5550;  1 drivers
v000002b865bbd160_0 .net/s *"_ivl_2", 31 0, L_000002b865bd5410;  1 drivers
v000002b865bbdac0_0 .net/s *"_ivl_20", 31 0, L_000002b865bd4290;  1 drivers
v000002b865bbdca0_0 .net/s *"_ivl_24", 32 0, L_000002b865bd4dd0;  1 drivers
v000002b865bbdf20_0 .net/s *"_ivl_26", 32 0, L_000002b865bd3430;  1 drivers
v000002b865bbd020_0 .net/s *"_ivl_30", 32 0, L_000002b865bd48d0;  1 drivers
v000002b865bbd200_0 .net/s *"_ivl_32", 32 0, L_000002b865bd4e70;  1 drivers
v000002b865bbde80_0 .net *"_ivl_38", 21 0, L_000002b865bd4970;  1 drivers
v000002b865bbce40_0 .net *"_ivl_42", 21 0, L_000002b865bd3750;  1 drivers
v000002b865bbd340_0 .net/s *"_ivl_6", 31 0, L_000002b865bd3250;  1 drivers
v000002b865bbdc00_0 .net/s *"_ivl_8", 31 0, L_000002b865bd4790;  1 drivers
v000002b865bbdfc0_0 .net/s "a_im", 15 0, v000002b865bcfec0_0;  alias, 1 drivers
v000002b865bbdb60_0 .net/s "a_re", 15 0, v000002b865bd0280_0;  alias, 1 drivers
v000002b865bbe420_0 .net/s "ac", 31 0, L_000002b865bd3610;  1 drivers
v000002b865bbe1a0_0 .net/s "ad", 31 0, L_000002b865bd4010;  1 drivers
v000002b865bbe240_0 .net/s "b_im", 15 0, v000002b865bcd080_0;  alias, 1 drivers
v000002b865bbe2e0_0 .net/s "b_re", 15 0, v000002b865bccb80_0;  alias, 1 drivers
v000002b865bbd520_0 .net/s "bc", 31 0, L_000002b865bd3390;  1 drivers
v000002b865bbd0c0_0 .net/s "bd", 31 0, L_000002b865bd54b0;  1 drivers
v000002b865bbe4c0_0 .net/s "im_long", 32 0, L_000002b865bd3070;  1 drivers
v000002b865bbd3e0_0 .net/s "im_shifted", 32 0, L_000002b865bd31b0;  1 drivers
v000002b865bbd700_0 .var/s "p_im", 15 0;
v000002b865bbcee0_0 .var/s "p_re", 15 0;
v000002b865bbd7a0_0 .net/s "re_long", 32 0, L_000002b865bd2fd0;  1 drivers
v000002b865bbd980_0 .net/s "re_shifted", 32 0, L_000002b865bd4fb0;  1 drivers
E_000002b865acf3e0 .event anyedge, v000002b865bbd980_0, v000002b865bbd3e0_0;
L_000002b865bd46f0 .extend/s 32, v000002b865bd0280_0;
L_000002b865bd5410 .extend/s 32, v000002b865bccb80_0;
L_000002b865bd3610 .arith/mult 32, L_000002b865bd46f0, L_000002b865bd5410;
L_000002b865bd3250 .extend/s 32, v000002b865bcfec0_0;
L_000002b865bd4790 .extend/s 32, v000002b865bcd080_0;
L_000002b865bd54b0 .arith/mult 32, L_000002b865bd3250, L_000002b865bd4790;
L_000002b865bd2f30 .extend/s 32, v000002b865bd0280_0;
L_000002b865bd4d30 .extend/s 32, v000002b865bcd080_0;
L_000002b865bd4010 .arith/mult 32, L_000002b865bd2f30, L_000002b865bd4d30;
L_000002b865bd5550 .extend/s 32, v000002b865bcfec0_0;
L_000002b865bd4290 .extend/s 32, v000002b865bccb80_0;
L_000002b865bd3390 .arith/mult 32, L_000002b865bd5550, L_000002b865bd4290;
L_000002b865bd4dd0 .extend/s 33, L_000002b865bd3610;
L_000002b865bd3430 .extend/s 33, L_000002b865bd54b0;
L_000002b865bd2fd0 .arith/sub 33, L_000002b865bd4dd0, L_000002b865bd3430;
L_000002b865bd48d0 .extend/s 33, L_000002b865bd4010;
L_000002b865bd4e70 .extend/s 33, L_000002b865bd3390;
L_000002b865bd3070 .arith/sum 33, L_000002b865bd48d0, L_000002b865bd4e70;
L_000002b865bd4970 .part L_000002b865bd2fd0, 11, 22;
L_000002b865bd4fb0 .extend/s 33, L_000002b865bd4970;
L_000002b865bd3750 .part L_000002b865bd3070, 11, 22;
L_000002b865bd31b0 .extend/s 33, L_000002b865bd3750;
S_000002b865bb6230 .scope module, "u_mul_10" "complex_mult" 13 57, 5 1 0, S_000002b865bb5a60;
 .timescale -9 -12;
    .port_info 0 /INPUT 16 "a_re";
    .port_info 1 /INPUT 16 "a_im";
    .port_info 2 /INPUT 16 "b_re";
    .port_info 3 /INPUT 16 "b_im";
    .port_info 4 /OUTPUT 16 "p_re";
    .port_info 5 /OUTPUT 16 "p_im";
P_000002b865a216a0 .param/l "FRAC" 0 5 3, +C4<00000000000000000000000000001011>;
P_000002b865a216d8 .param/l "MAX_VAL" 1 5 28, +C4<0111111111111111>;
P_000002b865a21710 .param/l "MIN_VAL" 1 5 29, +C4<1000000000000000>;
P_000002b865a21748 .param/l "WIDTH" 0 5 2, +C4<00000000000000000000000000010000>;
v000002b865bca1f0_0 .net/s *"_ivl_0", 31 0, L_000002b865bd4f10;  1 drivers
v000002b865bca650_0 .net/s *"_ivl_12", 31 0, L_000002b865bd3bb0;  1 drivers
v000002b865bc88f0_0 .net/s *"_ivl_14", 31 0, L_000002b865bd3ed0;  1 drivers
v000002b865bca6f0_0 .net/s *"_ivl_18", 31 0, L_000002b865bd4330;  1 drivers
v000002b865bcac90_0 .net/s *"_ivl_2", 31 0, L_000002b865bd55f0;  1 drivers
v000002b865bca290_0 .net/s *"_ivl_20", 31 0, L_000002b865bd7990;  1 drivers
v000002b865bc9110_0 .net/s *"_ivl_24", 32 0, L_000002b865bd7cb0;  1 drivers
v000002b865bcab50_0 .net/s *"_ivl_26", 32 0, L_000002b865bd7d50;  1 drivers
v000002b865bca0b0_0 .net/s *"_ivl_30", 32 0, L_000002b865bd6630;  1 drivers
v000002b865bc9cf0_0 .net/s *"_ivl_32", 32 0, L_000002b865bd5c30;  1 drivers
v000002b865bc9930_0 .net *"_ivl_38", 21 0, L_000002b865bd5eb0;  1 drivers
v000002b865bc8f30_0 .net *"_ivl_42", 21 0, L_000002b865bd6e50;  1 drivers
v000002b865bc8ad0_0 .net/s *"_ivl_6", 31 0, L_000002b865bd3890;  1 drivers
v000002b865bca010_0 .net/s *"_ivl_8", 31 0, L_000002b865bd3930;  1 drivers
v000002b865bca150_0 .net/s "a_im", 15 0, v000002b865bcf740_0;  alias, 1 drivers
v000002b865bcabf0_0 .net/s "a_re", 15 0, v000002b865bcf7e0_0;  alias, 1 drivers
v000002b865bc8990_0 .net/s "ac", 31 0, L_000002b865bd5050;  1 drivers
v000002b865bca330_0 .net/s "ad", 31 0, L_000002b865bd40b0;  1 drivers
v000002b865bc9750_0 .net/s "b_im", 15 0, v000002b865bcd760_0;  alias, 1 drivers
v000002b865bcaab0_0 .net/s "b_re", 15 0, v000002b865bcda80_0;  alias, 1 drivers
v000002b865bc8a30_0 .net/s "bc", 31 0, L_000002b865bd6a90;  1 drivers
v000002b865bc9250_0 .net/s "bd", 31 0, L_000002b865bd39d0;  1 drivers
v000002b865bcad30_0 .net/s "im_long", 32 0, L_000002b865bd7710;  1 drivers
v000002b865bca830_0 .net/s "im_shifted", 32 0, L_000002b865bd78f0;  1 drivers
v000002b865bca3d0_0 .var/s "p_im", 15 0;
v000002b865bc9610_0 .var/s "p_re", 15 0;
v000002b865bc97f0_0 .net/s "re_long", 32 0, L_000002b865bd5910;  1 drivers
v000002b865bc99d0_0 .net/s "re_shifted", 32 0, L_000002b865bd7850;  1 drivers
E_000002b865ad0560 .event anyedge, v000002b865bc99d0_0, v000002b865bca830_0;
L_000002b865bd4f10 .extend/s 32, v000002b865bcf7e0_0;
L_000002b865bd55f0 .extend/s 32, v000002b865bcda80_0;
L_000002b865bd5050 .arith/mult 32, L_000002b865bd4f10, L_000002b865bd55f0;
L_000002b865bd3890 .extend/s 32, v000002b865bcf740_0;
L_000002b865bd3930 .extend/s 32, v000002b865bcd760_0;
L_000002b865bd39d0 .arith/mult 32, L_000002b865bd3890, L_000002b865bd3930;
L_000002b865bd3bb0 .extend/s 32, v000002b865bcf7e0_0;
L_000002b865bd3ed0 .extend/s 32, v000002b865bcd760_0;
L_000002b865bd40b0 .arith/mult 32, L_000002b865bd3bb0, L_000002b865bd3ed0;
L_000002b865bd4330 .extend/s 32, v000002b865bcf740_0;
L_000002b865bd7990 .extend/s 32, v000002b865bcda80_0;
L_000002b865bd6a90 .arith/mult 32, L_000002b865bd4330, L_000002b865bd7990;
L_000002b865bd7cb0 .extend/s 33, L_000002b865bd5050;
L_000002b865bd7d50 .extend/s 33, L_000002b865bd39d0;
L_000002b865bd5910 .arith/sub 33, L_000002b865bd7cb0, L_000002b865bd7d50;
L_000002b865bd6630 .extend/s 33, L_000002b865bd40b0;
L_000002b865bd5c30 .extend/s 33, L_000002b865bd6a90;
L_000002b865bd7710 .arith/sum 33, L_000002b865bd6630, L_000002b865bd5c30;
L_000002b865bd5eb0 .part L_000002b865bd5910, 11, 22;
L_000002b865bd7850 .extend/s 33, L_000002b865bd5eb0;
L_000002b865bd6e50 .part L_000002b865bd7710, 11, 22;
L_000002b865bd78f0 .extend/s 33, L_000002b865bd6e50;
S_000002b865bb63c0 .scope module, "u_mul_11" "complex_mult" 13 62, 5 1 0, S_000002b865bb5a60;
 .timescale -9 -12;
    .port_info 0 /INPUT 16 "a_re";
    .port_info 1 /INPUT 16 "a_im";
    .port_info 2 /INPUT 16 "b_re";
    .port_info 3 /INPUT 16 "b_im";
    .port_info 4 /OUTPUT 16 "p_re";
    .port_info 5 /OUTPUT 16 "p_im";
P_000002b865a21790 .param/l "FRAC" 0 5 3, +C4<00000000000000000000000000001011>;
P_000002b865a217c8 .param/l "MAX_VAL" 1 5 28, +C4<0111111111111111>;
P_000002b865a21800 .param/l "MIN_VAL" 1 5 29, +C4<1000000000000000>;
P_000002b865a21838 .param/l "WIDTH" 0 5 2, +C4<00000000000000000000000000010000>;
v000002b865bc8b70_0 .net/s *"_ivl_0", 31 0, L_000002b865bd7030;  1 drivers
v000002b865bc9d90_0 .net/s *"_ivl_12", 31 0, L_000002b865bd6b30;  1 drivers
v000002b865bcaa10_0 .net/s *"_ivl_14", 31 0, L_000002b865bd7210;  1 drivers
v000002b865bca470_0 .net/s *"_ivl_18", 31 0, L_000002b865bd6bd0;  1 drivers
v000002b865bc9b10_0 .net/s *"_ivl_2", 31 0, L_000002b865bd73f0;  1 drivers
v000002b865bca790_0 .net/s *"_ivl_20", 31 0, L_000002b865bd6450;  1 drivers
v000002b865bc8670_0 .net/s *"_ivl_24", 32 0, L_000002b865bd5f50;  1 drivers
v000002b865bc9070_0 .net/s *"_ivl_26", 32 0, L_000002b865bd6810;  1 drivers
v000002b865bc94d0_0 .net/s *"_ivl_30", 32 0, L_000002b865bd61d0;  1 drivers
v000002b865bca8d0_0 .net/s *"_ivl_32", 32 0, L_000002b865bd57d0;  1 drivers
v000002b865bc8c10_0 .net *"_ivl_38", 21 0, L_000002b865bd5a50;  1 drivers
v000002b865bc8d50_0 .net *"_ivl_42", 21 0, L_000002b865bd6950;  1 drivers
v000002b865bc8710_0 .net/s *"_ivl_6", 31 0, L_000002b865bd7670;  1 drivers
v000002b865bca970_0 .net/s *"_ivl_8", 31 0, L_000002b865bd59b0;  1 drivers
v000002b865bcadd0_0 .net/s "a_im", 15 0, v000002b865bcf240_0;  alias, 1 drivers
v000002b865bc92f0_0 .net/s "a_re", 15 0, v000002b865bcf380_0;  alias, 1 drivers
v000002b865bc87b0_0 .net/s "ac", 31 0, L_000002b865bd6770;  1 drivers
v000002b865bc8850_0 .net/s "ad", 31 0, L_000002b865bd6130;  1 drivers
v000002b865bc9e30_0 .net/s "b_im", 15 0, v000002b865bcd080_0;  alias, 1 drivers
v000002b865bc9ed0_0 .net/s "b_re", 15 0, v000002b865bccb80_0;  alias, 1 drivers
v000002b865bc8cb0_0 .net/s "bc", 31 0, L_000002b865bd66d0;  1 drivers
v000002b865bc8df0_0 .net/s "bd", 31 0, L_000002b865bd69f0;  1 drivers
v000002b865bca510_0 .net/s "im_long", 32 0, L_000002b865bd68b0;  1 drivers
v000002b865bc9890_0 .net/s "im_shifted", 32 0, L_000002b865bd70d0;  1 drivers
v000002b865bc8e90_0 .var/s "p_im", 15 0;
v000002b865bc9c50_0 .var/s "p_re", 15 0;
v000002b865bc8fd0_0 .net/s "re_long", 32 0, L_000002b865bd7170;  1 drivers
v000002b865bc91b0_0 .net/s "re_shifted", 32 0, L_000002b865bd7a30;  1 drivers
E_000002b865acfd20 .event anyedge, v000002b865bc91b0_0, v000002b865bc9890_0;
L_000002b865bd7030 .extend/s 32, v000002b865bcf380_0;
L_000002b865bd73f0 .extend/s 32, v000002b865bccb80_0;
L_000002b865bd6770 .arith/mult 32, L_000002b865bd7030, L_000002b865bd73f0;
L_000002b865bd7670 .extend/s 32, v000002b865bcf240_0;
L_000002b865bd59b0 .extend/s 32, v000002b865bcd080_0;
L_000002b865bd69f0 .arith/mult 32, L_000002b865bd7670, L_000002b865bd59b0;
L_000002b865bd6b30 .extend/s 32, v000002b865bcf380_0;
L_000002b865bd7210 .extend/s 32, v000002b865bcd080_0;
L_000002b865bd6130 .arith/mult 32, L_000002b865bd6b30, L_000002b865bd7210;
L_000002b865bd6bd0 .extend/s 32, v000002b865bcf240_0;
L_000002b865bd6450 .extend/s 32, v000002b865bccb80_0;
L_000002b865bd66d0 .arith/mult 32, L_000002b865bd6bd0, L_000002b865bd6450;
L_000002b865bd5f50 .extend/s 33, L_000002b865bd6770;
L_000002b865bd6810 .extend/s 33, L_000002b865bd69f0;
L_000002b865bd7170 .arith/sub 33, L_000002b865bd5f50, L_000002b865bd6810;
L_000002b865bd61d0 .extend/s 33, L_000002b865bd6130;
L_000002b865bd57d0 .extend/s 33, L_000002b865bd66d0;
L_000002b865bd68b0 .arith/sum 33, L_000002b865bd61d0, L_000002b865bd57d0;
L_000002b865bd5a50 .part L_000002b865bd7170, 11, 22;
L_000002b865bd7a30 .extend/s 33, L_000002b865bd5a50;
L_000002b865bd6950 .part L_000002b865bd68b0, 11, 22;
L_000002b865bd70d0 .extend/s 33, L_000002b865bd6950;
    .scope S_000002b865a18220;
T_15 ;
    %wait E_000002b865accc60;
    %load/vec4 v000002b865b26130_0;
    %cmpi/s 32767, 0, 33;
    %flag_or 5, 4; GT is !LE
    %flag_inv 5;
    %jmp/0xz  T_15.0, 5;
    %pushi/vec4 32767, 0, 16;
    %store/vec4 v000002b865b26bd0_0, 0, 16;
    %jmp T_15.1;
T_15.0 ;
    %load/vec4 v000002b865b26130_0;
    %pushi/vec4 4294950912, 0, 32;
    %concati/vec4 0, 0, 1;
    %cmp/s;
    %jmp/0xz  T_15.2, 5;
    %pushi/vec4 32768, 0, 16;
    %store/vec4 v000002b865b26bd0_0, 0, 16;
    %jmp T_15.3;
T_15.2 ;
    %load/vec4 v000002b865b26130_0;
    %parti/s 16, 0, 2;
    %store/vec4 v000002b865b26bd0_0, 0, 16;
T_15.3 ;
T_15.1 ;
    %load/vec4 v000002b865b25a50_0;
    %cmpi/s 32767, 0, 33;
    %flag_or 5, 4; GT is !LE
    %flag_inv 5;
    %jmp/0xz  T_15.4, 5;
    %pushi/vec4 32767, 0, 16;
    %store/vec4 v000002b865b27030_0, 0, 16;
    %jmp T_15.5;
T_15.4 ;
    %load/vec4 v000002b865b25a50_0;
    %pushi/vec4 4294950912, 0, 32;
    %concati/vec4 0, 0, 1;
    %cmp/s;
    %jmp/0xz  T_15.6, 5;
    %pushi/vec4 32768, 0, 16;
    %store/vec4 v000002b865b27030_0, 0, 16;
    %jmp T_15.7;
T_15.6 ;
    %load/vec4 v000002b865b25a50_0;
    %parti/s 16, 0, 2;
    %store/vec4 v000002b865b27030_0, 0, 16;
T_15.7 ;
T_15.5 ;
    %jmp T_15;
    .thread T_15, $push;
    .scope S_000002b86566a4a0;
T_16 ;
    %wait E_000002b865acce60;
    %load/vec4 v000002b865a8c4a0_0;
    %cmpi/s 32767, 0, 33;
    %flag_or 5, 4; GT is !LE
    %flag_inv 5;
    %jmp/0xz  T_16.0, 5;
    %pushi/vec4 32767, 0, 16;
    %store/vec4 v000002b865ac5c40_0, 0, 16;
    %jmp T_16.1;
T_16.0 ;
    %load/vec4 v000002b865a8c4a0_0;
    %pushi/vec4 4294950912, 0, 32;
    %concati/vec4 0, 0, 1;
    %cmp/s;
    %jmp/0xz  T_16.2, 5;
    %pushi/vec4 32768, 0, 16;
    %store/vec4 v000002b865ac5c40_0, 0, 16;
    %jmp T_16.3;
T_16.2 ;
    %load/vec4 v000002b865a8c4a0_0;
    %parti/s 16, 0, 2;
    %store/vec4 v000002b865ac5c40_0, 0, 16;
T_16.3 ;
T_16.1 ;
    %load/vec4 v000002b865ac5b00_0;
    %cmpi/s 32767, 0, 33;
    %flag_or 5, 4; GT is !LE
    %flag_inv 5;
    %jmp/0xz  T_16.4, 5;
    %pushi/vec4 32767, 0, 16;
    %store/vec4 v000002b865ac5f60_0, 0, 16;
    %jmp T_16.5;
T_16.4 ;
    %load/vec4 v000002b865ac5b00_0;
    %pushi/vec4 4294950912, 0, 32;
    %concati/vec4 0, 0, 1;
    %cmp/s;
    %jmp/0xz  T_16.6, 5;
    %pushi/vec4 32768, 0, 16;
    %store/vec4 v000002b865ac5f60_0, 0, 16;
    %jmp T_16.7;
T_16.6 ;
    %load/vec4 v000002b865ac5b00_0;
    %parti/s 16, 0, 2;
    %store/vec4 v000002b865ac5f60_0, 0, 16;
T_16.7 ;
T_16.5 ;
    %jmp T_16;
    .thread T_16, $push;
    .scope S_000002b86566a630;
T_17 ;
    %wait E_000002b865acc9e0;
    %load/vec4 v000002b865ba8720_0;
    %pad/s 32;
    %cmpi/s 0, 0, 32;
    %jmp/0xz  T_17.0, 5;
    %load/vec4 v000002b865ba8720_0;
    %inv;
    %pushi/vec4 1, 0, 16;
    %add;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000002b865a8c900, 4, 0;
    %load/vec4 v000002b865ba7960_0;
    %inv;
    %pushi/vec4 1, 0, 16;
    %add;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000002b865ba8c20, 4, 0;
    %pushi/vec4 6434, 0, 16;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000002b865ba8d60, 4, 0;
    %jmp T_17.1;
T_17.0 ;
    %load/vec4 v000002b865ba8720_0;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000002b865a8c900, 4, 0;
    %load/vec4 v000002b865ba7960_0;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000002b865ba8c20, 4, 0;
    %pushi/vec4 0, 0, 16;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000002b865ba8d60, 4, 0;
T_17.1 ;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000002b865a8c720_0, 0, 32;
T_17.2 ;
    %load/vec4 v000002b865a8c720_0;
    %cmpi/s 12, 0, 32;
    %jmp/0xz T_17.3, 5;
    %ix/getv/s 4, v000002b865a8c720_0;
    %load/vec4a v000002b865ba8c20, 4;
    %pad/s 32;
    %cmpi/s 0, 0, 32;
    %flag_or 5, 4; GT is !LE
    %flag_inv 5;
    %jmp/0xz  T_17.4, 5;
    %ix/getv/s 4, v000002b865a8c720_0;
    %load/vec4a v000002b865a8c900, 4;
    %ix/getv/s 4, v000002b865a8c720_0;
    %load/vec4a v000002b865ba8c20, 4;
    %load/vec4 v000002b865a8c720_0;
    %ix/vec4 4;
    %shiftr/s 4;
    %add;
    %load/vec4 v000002b865a8c720_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %store/vec4a v000002b865a8c900, 4, 0;
    %ix/getv/s 4, v000002b865a8c720_0;
    %load/vec4a v000002b865ba8c20, 4;
    %ix/getv/s 4, v000002b865a8c720_0;
    %load/vec4a v000002b865a8c900, 4;
    %load/vec4 v000002b865a8c720_0;
    %ix/vec4 4;
    %shiftr/s 4;
    %sub;
    %load/vec4 v000002b865a8c720_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %store/vec4a v000002b865ba8c20, 4, 0;
    %ix/getv/s 4, v000002b865a8c720_0;
    %load/vec4a v000002b865ba8d60, 4;
    %ix/getv/s 4, v000002b865a8c720_0;
    %load/vec4a v000002b865a8c680, 4;
    %add;
    %load/vec4 v000002b865a8c720_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %store/vec4a v000002b865ba8d60, 4, 0;
    %jmp T_17.5;
T_17.4 ;
    %ix/getv/s 4, v000002b865a8c720_0;
    %load/vec4a v000002b865a8c900, 4;
    %ix/getv/s 4, v000002b865a8c720_0;
    %load/vec4a v000002b865ba8c20, 4;
    %load/vec4 v000002b865a8c720_0;
    %ix/vec4 4;
    %shiftr/s 4;
    %sub;
    %load/vec4 v000002b865a8c720_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %store/vec4a v000002b865a8c900, 4, 0;
    %ix/getv/s 4, v000002b865a8c720_0;
    %load/vec4a v000002b865ba8c20, 4;
    %ix/getv/s 4, v000002b865a8c720_0;
    %load/vec4a v000002b865a8c900, 4;
    %load/vec4 v000002b865a8c720_0;
    %ix/vec4 4;
    %shiftr/s 4;
    %add;
    %load/vec4 v000002b865a8c720_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %store/vec4a v000002b865ba8c20, 4, 0;
    %ix/getv/s 4, v000002b865a8c720_0;
    %load/vec4a v000002b865ba8d60, 4;
    %ix/getv/s 4, v000002b865a8c720_0;
    %load/vec4a v000002b865a8c680, 4;
    %sub;
    %load/vec4 v000002b865a8c720_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %store/vec4a v000002b865ba8d60, 4, 0;
T_17.5 ;
    %load/vec4 v000002b865a8c720_0;
    %addi 1, 0, 32;
    %store/vec4 v000002b865a8c720_0, 0, 32;
    %jmp T_17.2;
T_17.3 ;
    %ix/load 4, 12, 0;
    %flag_set/imm 4, 0;
    %load/vec4a v000002b865ba8d60, 4;
    %store/vec4 v000002b865ba8860_0, 0, 16;
    %jmp T_17;
    .thread T_17, $push;
    .scope S_000002b865a18090;
T_18 ;
    %wait E_000002b865accba0;
    %load/vec4 v000002b865ba7dc0_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_18.0, 8;
    %load/vec4 v000002b865ba8360_0;
    %pad/u 8;
    %ix/vec4 4;
    %load/vec4a v000002b865ba8680, 4;
    %assign/vec4 v000002b865ba7c80_0, 0;
    %load/vec4 v000002b865ba8360_0;
    %pad/u 8;
    %ix/vec4 4;
    %load/vec4a v000002b865ba8f40, 4;
    %assign/vec4 v000002b865ba9440_0, 0;
    %load/vec4 v000002b865ba8360_0;
    %pad/u 8;
    %ix/vec4 4;
    %load/vec4a v000002b865ba75a0, 4;
    %assign/vec4 v000002b865ba9080_0, 0;
    %load/vec4 v000002b865ba8360_0;
    %pad/u 8;
    %ix/vec4 4;
    %load/vec4a v000002b865ba8e00, 4;
    %assign/vec4 v000002b865ba8cc0_0, 0;
    %load/vec4 v000002b865ba8180_0;
    %load/vec4 v000002b865baa9b0_0;
    %pad/u 8;
    %ix/vec4 3;
    %ix/load 4, 0, 0; Constant delay
    %assign/vec4/a/d v000002b865ba8680, 0, 4;
    %load/vec4 v000002b865ba80e0_0;
    %load/vec4 v000002b865baa9b0_0;
    %pad/u 8;
    %ix/vec4 3;
    %ix/load 4, 0, 0; Constant delay
    %assign/vec4/a/d v000002b865ba8f40, 0, 4;
    %load/vec4 v000002b865ba87c0_0;
    %load/vec4 v000002b865baa9b0_0;
    %pad/u 8;
    %ix/vec4 3;
    %ix/load 4, 0, 0; Constant delay
    %assign/vec4/a/d v000002b865ba75a0, 0, 4;
    %load/vec4 v000002b865ba8400_0;
    %load/vec4 v000002b865baa9b0_0;
    %pad/u 8;
    %ix/vec4 3;
    %ix/load 4, 0, 0; Constant delay
    %assign/vec4/a/d v000002b865ba8e00, 0, 4;
    %load/vec4 v000002b865ba8180_0;
    %assign/vec4 v000002b865ba8220_0, 0;
    %load/vec4 v000002b865ba80e0_0;
    %assign/vec4 v000002b865ba78c0_0, 0;
    %load/vec4 v000002b865ba87c0_0;
    %assign/vec4 v000002b865ba8b80_0, 0;
    %load/vec4 v000002b865ba8400_0;
    %assign/vec4 v000002b865ba7a00_0, 0;
    %load/vec4 v000002b865baa9b0_0;
    %pad/u 32;
    %cmpi/e 63, 0, 32;
    %flag_mov 8, 4;
    %jmp/0 T_18.2, 8;
    %pushi/vec4 0, 0, 6;
    %jmp/1 T_18.3, 8;
T_18.2 ; End of true expr.
    %load/vec4 v000002b865baa9b0_0;
    %addi 1, 0, 6;
    %jmp/0 T_18.3, 8;
 ; End of false expr.
    %blend;
T_18.3;
    %assign/vec4 v000002b865baa9b0_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000002b865ba9f10_0, 0;
    %jmp T_18.1;
T_18.0 ;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000002b865ba9f10_0, 0;
T_18.1 ;
    %jmp T_18;
    .thread T_18;
    .scope S_000002b865a18090;
T_19 ;
    %wait E_000002b865acd520;
    %load/vec4 v000002b865ba8ea0_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_19.0, 8;
    %pushi/vec4 0, 0, 6;
    %assign/vec4 v000002b865baa9b0_0, 0;
    %jmp T_19.1;
T_19.0 ;
    %load/vec4 v000002b865baaf50_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_19.2, 8;
    %pushi/vec4 0, 0, 6;
    %assign/vec4 v000002b865baa9b0_0, 0;
T_19.2 ;
T_19.1 ;
    %jmp T_19;
    .thread T_19;
    .scope S_000002b865a18090;
T_20 ;
    %wait E_000002b865acd520;
    %load/vec4 v000002b865ba8ea0_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_20.0, 8;
    %pushi/vec4 0, 0, 6;
    %assign/vec4 v000002b865ba7b40_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000002b865ba8900_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000002b865ba9260_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000002b865ba93a0_0, 0;
    %jmp T_20.1;
T_20.0 ;
    %load/vec4 v000002b865baaf50_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_20.2, 8;
    %pushi/vec4 0, 0, 6;
    %assign/vec4 v000002b865ba7b40_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000002b865ba8900_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000002b865ba9260_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000002b865ba93a0_0, 0;
    %jmp T_20.3;
T_20.2 ;
    %load/vec4 v000002b865ba9f10_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_20.4, 8;
    %load/vec4 v000002b865ba7b40_0;
    %pad/u 32;
    %cmpi/u 16, 0, 32;
    %jmp/0xz  T_20.6, 5;
    %load/vec4 v000002b865ba8900_0;
    %load/vec4 v000002b865ba7f00_0;
    %pad/s 32;
    %add;
    %assign/vec4 v000002b865ba8900_0, 0;
    %load/vec4 v000002b865ba9260_0;
    %load/vec4 v000002b865ba7d20_0;
    %pad/s 32;
    %add;
    %assign/vec4 v000002b865ba9260_0, 0;
    %load/vec4 v000002b865ba7b40_0;
    %addi 1, 0, 6;
    %assign/vec4 v000002b865ba7b40_0, 0;
    %load/vec4 v000002b865ba7b40_0;
    %pad/u 32;
    %cmpi/e 15, 0, 32;
    %jmp/0xz  T_20.8, 4;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000002b865ba93a0_0, 0;
T_20.8 ;
    %jmp T_20.7;
T_20.6 ;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000002b865ba93a0_0, 0;
T_20.7 ;
T_20.4 ;
T_20.3 ;
T_20.1 ;
    %jmp T_20;
    .thread T_20;
    .scope S_000002b865a18090;
T_21 ;
    %wait E_000002b865acd520;
    %load/vec4 v000002b865ba8ea0_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_21.0, 8;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000002b865ba89a0_0, 0;
    %pushi/vec4 0, 0, 16;
    %assign/vec4 v000002b865ba8fe0_0, 0;
    %jmp T_21.1;
T_21.0 ;
    %load/vec4 v000002b865ba93a0_0;
    %assign/vec4 v000002b865ba89a0_0, 0;
    %load/vec4 v000002b865ba7780_0;
    %inv;
    %pushi/vec4 1, 0, 16;
    %add;
    %assign/vec4 v000002b865ba8fe0_0, 0;
T_21.1 ;
    %jmp T_21;
    .thread T_21;
    .scope S_000002b865bb5100;
T_22 ;
    %wait E_000002b865acd520;
    %load/vec4 v000002b865bb6f90_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_22.0, 8;
    %pushi/vec4 0, 0, 16;
    %assign/vec4 v000002b865bb7cb0_0, 0;
    %jmp T_22.1;
T_22.0 ;
    %load/vec4 v000002b865bb7530_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_22.2, 8;
    %load/vec4 v000002b865bb7ad0_0;
    %muli 201, 0, 16;
    %ix/load 4, 11, 0;
    %flag_set/imm 4, 0;
    %shiftr/s 4;
    %assign/vec4 v000002b865bb7cb0_0, 0;
T_22.2 ;
T_22.1 ;
    %jmp T_22;
    .thread T_22;
    .scope S_000002b865bb5100;
T_23 ;
    %wait E_000002b865acd520;
    %load/vec4 v000002b865bb6f90_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_23.0, 8;
    %pushi/vec4 0, 0, 16;
    %assign/vec4 v000002b865bb7990_0, 0;
    %jmp T_23.1;
T_23.0 ;
    %load/vec4 v000002b865bb7990_0;
    %pad/s 17;
    %store/vec4 v000002b865bb66d0_0, 0, 17;
    %load/vec4 v000002b865bb8890_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_23.2, 8;
    %load/vec4 v000002b865bb7990_0;
    %pad/s 17;
    %load/vec4 v000002b865bb7cb0_0;
    %pad/s 17;
    %sub;
    %store/vec4 v000002b865bb66d0_0, 0, 17;
T_23.2 ;
    %load/vec4 v000002b865bb7b70_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_23.4, 8;
    %load/vec4 v000002b865bb66d0_0;
    %load/vec4 v000002b865bb6b30_0;
    %pad/s 17;
    %sub;
    %store/vec4 v000002b865bb66d0_0, 0, 17;
T_23.4 ;
    %load/vec4 v000002b865bb66d0_0;
    %cmpi/s 6434, 0, 17;
    %flag_or 5, 4; GT is !LE
    %flag_inv 5;
    %jmp/0xz  T_23.6, 5;
    %load/vec4 v000002b865bb66d0_0;
    %subi 12868, 0, 17;
    %pad/s 16;
    %assign/vec4 v000002b865bb7990_0, 0;
    %jmp T_23.7;
T_23.6 ;
    %load/vec4 v000002b865bb66d0_0;
    %cmpi/s 124638, 0, 17;
    %jmp/0xz  T_23.8, 5;
    %load/vec4 v000002b865bb66d0_0;
    %addi 12868, 0, 17;
    %pad/s 16;
    %assign/vec4 v000002b865bb7990_0, 0;
    %jmp T_23.9;
T_23.8 ;
    %load/vec4 v000002b865bb66d0_0;
    %parti/s 16, 0, 2;
    %assign/vec4 v000002b865bb7990_0, 0;
T_23.9 ;
T_23.7 ;
T_23.1 ;
    %jmp T_23;
    .thread T_23;
    .scope S_000002b865bb5100;
T_24 ;
    %wait E_000002b865accba0;
    %load/vec4 v000002b865bb7990_0;
    %assign/vec4 v000002b865bb7d50_0, 0;
    %jmp T_24;
    .thread T_24;
    .scope S_000002b865bb58d0;
T_25 ;
    %wait E_000002b865acf5a0;
    %load/vec4 v000002b865bb8390_0;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000002b865bb89d0, 4, 0;
    %load/vec4 v000002b865bba640_0;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000002b865bb70d0, 4, 0;
    %load/vec4 v000002b865bb82f0_0;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000002b865bbcc60, 4, 0;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000002b865bb7030_0, 0, 32;
T_25.0 ;
    %load/vec4 v000002b865bb7030_0;
    %cmpi/s 12, 0, 32;
    %jmp/0xz T_25.1, 5;
    %ix/getv/s 4, v000002b865bb7030_0;
    %load/vec4a v000002b865bbcc60, 4;
    %pad/s 32;
    %cmpi/s 0, 0, 32;
    %flag_inv 5; GE is !LT
    %jmp/0xz  T_25.2, 5;
    %ix/getv/s 4, v000002b865bb7030_0;
    %load/vec4a v000002b865bb89d0, 4;
    %ix/getv/s 4, v000002b865bb7030_0;
    %load/vec4a v000002b865bb70d0, 4;
    %load/vec4 v000002b865bb7030_0;
    %ix/vec4 4;
    %shiftr/s 4;
    %sub;
    %load/vec4 v000002b865bb7030_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %store/vec4a v000002b865bb89d0, 4, 0;
    %ix/getv/s 4, v000002b865bb7030_0;
    %load/vec4a v000002b865bb70d0, 4;
    %ix/getv/s 4, v000002b865bb7030_0;
    %load/vec4a v000002b865bb89d0, 4;
    %load/vec4 v000002b865bb7030_0;
    %ix/vec4 4;
    %shiftr/s 4;
    %add;
    %load/vec4 v000002b865bb7030_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %store/vec4a v000002b865bb70d0, 4, 0;
    %ix/getv/s 4, v000002b865bb7030_0;
    %load/vec4a v000002b865bbcc60, 4;
    %ix/getv/s 4, v000002b865bb7030_0;
    %load/vec4a v000002b865bb84d0, 4;
    %sub;
    %load/vec4 v000002b865bb7030_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %store/vec4a v000002b865bbcc60, 4, 0;
    %jmp T_25.3;
T_25.2 ;
    %ix/getv/s 4, v000002b865bb7030_0;
    %load/vec4a v000002b865bb89d0, 4;
    %ix/getv/s 4, v000002b865bb7030_0;
    %load/vec4a v000002b865bb70d0, 4;
    %load/vec4 v000002b865bb7030_0;
    %ix/vec4 4;
    %shiftr/s 4;
    %add;
    %load/vec4 v000002b865bb7030_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %store/vec4a v000002b865bb89d0, 4, 0;
    %ix/getv/s 4, v000002b865bb7030_0;
    %load/vec4a v000002b865bb70d0, 4;
    %ix/getv/s 4, v000002b865bb7030_0;
    %load/vec4a v000002b865bb89d0, 4;
    %load/vec4 v000002b865bb7030_0;
    %ix/vec4 4;
    %shiftr/s 4;
    %sub;
    %load/vec4 v000002b865bb7030_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %store/vec4a v000002b865bb70d0, 4, 0;
    %ix/getv/s 4, v000002b865bb7030_0;
    %load/vec4a v000002b865bbcc60, 4;
    %ix/getv/s 4, v000002b865bb7030_0;
    %load/vec4a v000002b865bb84d0, 4;
    %add;
    %load/vec4 v000002b865bb7030_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %store/vec4a v000002b865bbcc60, 4, 0;
T_25.3 ;
    %load/vec4 v000002b865bb7030_0;
    %addi 1, 0, 32;
    %store/vec4 v000002b865bb7030_0, 0, 32;
    %jmp T_25.0;
T_25.1 ;
    %jmp T_25;
    .thread T_25, $push;
    .scope S_000002b865bb58d0;
T_26 ;
    %wait E_000002b865acf120;
    %load/vec4 v000002b865bb8430_0;
    %ix/load 4, 11, 0;
    %flag_set/imm 4, 0;
    %shiftr/s 4;
    %pad/s 16;
    %store/vec4 v000002b865bb8b10_0, 0, 16;
    %load/vec4 v000002b865bbbe00_0;
    %ix/load 4, 11, 0;
    %flag_set/imm 4, 0;
    %shiftr/s 4;
    %pad/s 16;
    %store/vec4 v000002b865bbc6c0_0, 0, 16;
    %jmp T_26;
    .thread T_26, $push;
    .scope S_000002b865bb4c50;
T_27 ;
    %wait E_000002b865acef60;
    %load/vec4 v000002b865bbcd00_0;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000002b865bbb860, 4, 0;
    %load/vec4 v000002b865bbc120_0;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000002b865bbb400, 4, 0;
    %load/vec4 v000002b865bbc800_0;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000002b865bba780, 4, 0;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000002b865bbc3a0_0, 0, 32;
T_27.0 ;
    %load/vec4 v000002b865bbc3a0_0;
    %cmpi/s 12, 0, 32;
    %jmp/0xz T_27.1, 5;
    %ix/getv/s 4, v000002b865bbc3a0_0;
    %load/vec4a v000002b865bba780, 4;
    %pad/s 32;
    %cmpi/s 0, 0, 32;
    %flag_inv 5; GE is !LT
    %jmp/0xz  T_27.2, 5;
    %ix/getv/s 4, v000002b865bbc3a0_0;
    %load/vec4a v000002b865bbb860, 4;
    %ix/getv/s 4, v000002b865bbc3a0_0;
    %load/vec4a v000002b865bbb400, 4;
    %load/vec4 v000002b865bbc3a0_0;
    %ix/vec4 4;
    %shiftr/s 4;
    %sub;
    %load/vec4 v000002b865bbc3a0_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %store/vec4a v000002b865bbb860, 4, 0;
    %ix/getv/s 4, v000002b865bbc3a0_0;
    %load/vec4a v000002b865bbb400, 4;
    %ix/getv/s 4, v000002b865bbc3a0_0;
    %load/vec4a v000002b865bbb860, 4;
    %load/vec4 v000002b865bbc3a0_0;
    %ix/vec4 4;
    %shiftr/s 4;
    %add;
    %load/vec4 v000002b865bbc3a0_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %store/vec4a v000002b865bbb400, 4, 0;
    %ix/getv/s 4, v000002b865bbc3a0_0;
    %load/vec4a v000002b865bba780, 4;
    %ix/getv/s 4, v000002b865bbc3a0_0;
    %load/vec4a v000002b865bbb9a0, 4;
    %sub;
    %load/vec4 v000002b865bbc3a0_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %store/vec4a v000002b865bba780, 4, 0;
    %jmp T_27.3;
T_27.2 ;
    %ix/getv/s 4, v000002b865bbc3a0_0;
    %load/vec4a v000002b865bbb860, 4;
    %ix/getv/s 4, v000002b865bbc3a0_0;
    %load/vec4a v000002b865bbb400, 4;
    %load/vec4 v000002b865bbc3a0_0;
    %ix/vec4 4;
    %shiftr/s 4;
    %add;
    %load/vec4 v000002b865bbc3a0_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %store/vec4a v000002b865bbb860, 4, 0;
    %ix/getv/s 4, v000002b865bbc3a0_0;
    %load/vec4a v000002b865bbb400, 4;
    %ix/getv/s 4, v000002b865bbc3a0_0;
    %load/vec4a v000002b865bbb860, 4;
    %load/vec4 v000002b865bbc3a0_0;
    %ix/vec4 4;
    %shiftr/s 4;
    %sub;
    %load/vec4 v000002b865bbc3a0_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %store/vec4a v000002b865bbb400, 4, 0;
    %ix/getv/s 4, v000002b865bbc3a0_0;
    %load/vec4a v000002b865bba780, 4;
    %ix/getv/s 4, v000002b865bbc3a0_0;
    %load/vec4a v000002b865bbb9a0, 4;
    %add;
    %load/vec4 v000002b865bbc3a0_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %store/vec4a v000002b865bba780, 4, 0;
T_27.3 ;
    %load/vec4 v000002b865bbc3a0_0;
    %addi 1, 0, 32;
    %store/vec4 v000002b865bbc3a0_0, 0, 32;
    %jmp T_27.0;
T_27.1 ;
    %jmp T_27;
    .thread T_27, $push;
    .scope S_000002b865bb4c50;
T_28 ;
    %wait E_000002b865acf1a0;
    %load/vec4 v000002b865bbbb80_0;
    %ix/load 4, 11, 0;
    %flag_set/imm 4, 0;
    %shiftr/s 4;
    %pad/s 16;
    %store/vec4 v000002b865bbaa00_0, 0, 16;
    %load/vec4 v000002b865bbb0e0_0;
    %ix/load 4, 11, 0;
    %flag_set/imm 4, 0;
    %shiftr/s 4;
    %pad/s 16;
    %store/vec4 v000002b865bbba40_0, 0, 16;
    %jmp T_28;
    .thread T_28, $push;
    .scope S_000002b865bb5f10;
T_29 ;
    %wait E_000002b865acd520;
    %load/vec4 v000002b865bbc1c0_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_29.0, 8;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000002b865bbb720_0, 0;
    %pushi/vec4 0, 0, 16;
    %assign/vec4 v000002b865bbbf40_0, 0;
    %pushi/vec4 0, 0, 16;
    %assign/vec4 v000002b865bbbae0_0, 0;
    %pushi/vec4 0, 0, 16;
    %assign/vec4 v000002b865bba820_0, 0;
    %pushi/vec4 0, 0, 16;
    %assign/vec4 v000002b865bbc260_0, 0;
    %jmp T_29.1;
T_29.0 ;
    %load/vec4 v000002b865bbc080_0;
    %assign/vec4 v000002b865bbb720_0, 0;
    %load/vec4 v000002b865bbb7c0_0;
    %assign/vec4 v000002b865bbbf40_0, 0;
    %load/vec4 v000002b865bbaaa0_0;
    %assign/vec4 v000002b865bbbae0_0, 0;
    %load/vec4 v000002b865bbbea0_0;
    %assign/vec4 v000002b865bba820_0, 0;
    %load/vec4 v000002b865bbab40_0;
    %assign/vec4 v000002b865bbc260_0, 0;
T_29.1 ;
    %jmp T_29;
    .thread T_29;
    .scope S_000002b865bab750;
T_30 ;
    %wait E_000002b865acd520;
    %load/vec4 v000002b865bb91f0_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_30.0, 8;
    %pushi/vec4 0, 0, 7;
    %assign/vec4 v000002b865bb9f10_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000002b865bb4400_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000002b865bb9510_0, 0;
    %jmp T_30.1;
T_30.0 ;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000002b865bb9510_0, 0;
    %load/vec4 v000002b865bb96f0_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_30.2, 8;
    %load/vec4 v000002b865bba410_0;
    %load/vec4 v000002b865bb4400_0;
    %load/vec4 v000002b865bb9f10_0;
    %parti/s 6, 0, 2;
    %concat/vec4; draw_concat_vec4
    %pad/u 9;
    %ix/vec4 3;
    %ix/load 4, 0, 0; Constant delay
    %assign/vec4/a/d v000002b865bb9a10, 0, 4;
    %load/vec4 v000002b865bb8ed0_0;
    %load/vec4 v000002b865bb4400_0;
    %load/vec4 v000002b865bb9f10_0;
    %parti/s 6, 0, 2;
    %concat/vec4; draw_concat_vec4
    %pad/u 9;
    %ix/vec4 3;
    %ix/load 4, 0, 0; Constant delay
    %assign/vec4/a/d v000002b865bba370, 0, 4;
    %load/vec4 v000002b865bb9f10_0;
    %pad/u 32;
    %cmpi/e 63, 0, 32;
    %jmp/0xz  T_30.4, 4;
    %pushi/vec4 0, 0, 7;
    %assign/vec4 v000002b865bb9f10_0, 0;
    %load/vec4 v000002b865bb4400_0;
    %inv;
    %assign/vec4 v000002b865bb4400_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000002b865bb9510_0, 0;
    %jmp T_30.5;
T_30.4 ;
    %load/vec4 v000002b865bb9f10_0;
    %addi 1, 0, 7;
    %assign/vec4 v000002b865bb9f10_0, 0;
T_30.5 ;
T_30.2 ;
T_30.1 ;
    %jmp T_30;
    .thread T_30;
    .scope S_000002b865bab750;
T_31 ;
    %wait E_000002b865acd520;
    %load/vec4 v000002b865bb91f0_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_31.0, 8;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000002b865bb3820_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000002b865bb9830_0, 0;
    %pushi/vec4 0, 0, 7;
    %assign/vec4 v000002b865bb9150_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000002b865bb9fb0_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000002b865bb9ab0_0, 0;
    %jmp T_31.1;
T_31.0 ;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000002b865bb9830_0, 0;
    %load/vec4 v000002b865bb9150_0;
    %pad/u 32;
    %cmpi/ne 0, 0, 32;
    %jmp/0xz  T_31.2, 4;
    %load/vec4 v000002b865bb9150_0;
    %subi 1, 0, 7;
    %assign/vec4 v000002b865bb9150_0, 0;
T_31.2 ;
    %load/vec4 v000002b865bb9150_0;
    %pad/u 32;
    %cmpi/e 0, 0, 32;
    %flag_get/vec4 4;
    %jmp/0 T_31.6, 4;
    %load/vec4 v000002b865bb9fb0_0;
    %and;
T_31.6;
    %flag_set/vec4 8;
    %jmp/0xz  T_31.4, 8;
    %load/vec4 v000002b865bb9ab0_0;
    %assign/vec4 v000002b865bb3820_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000002b865bb9830_0, 0;
    %pushi/vec4 64, 0, 7;
    %assign/vec4 v000002b865bb9150_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000002b865bb9fb0_0, 0;
T_31.4 ;
    %load/vec4 v000002b865bb9510_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_31.7, 8;
    %load/vec4 v000002b865bb9150_0;
    %pad/u 32;
    %cmpi/e 0, 0, 32;
    %flag_get/vec4 4;
    %jmp/0 T_31.11, 4;
    %load/vec4 v000002b865bb9fb0_0;
    %nor/r;
    %and;
T_31.11;
    %flag_set/vec4 8;
    %jmp/0xz  T_31.9, 8;
    %load/vec4 v000002b865bb4400_0;
    %inv;
    %assign/vec4 v000002b865bb3820_0, 0;
    %alloc S_000002b865babc00;
    %load/vec4 v000002b865bb4400_0;
    %inv;
    %store/vec4 v000002b865bb2920_0, 0, 1;
    %fork TD_tb_top_receiver.u_top.u_fft1.run_fft, S_000002b865babc00;
    %join;
    %free S_000002b865babc00;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000002b865bb9830_0, 0;
    %pushi/vec4 64, 0, 7;
    %assign/vec4 v000002b865bb9150_0, 0;
    %jmp T_31.10;
T_31.9 ;
    %load/vec4 v000002b865bb9fb0_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_31.12, 8;
    %load/vec4 v000002b865bb4400_0;
    %inv;
    %assign/vec4 v000002b865bb9ab0_0, 0;
    %alloc S_000002b865babc00;
    %load/vec4 v000002b865bb4400_0;
    %inv;
    %store/vec4 v000002b865bb2920_0, 0, 1;
    %fork TD_tb_top_receiver.u_top.u_fft1.run_fft, S_000002b865babc00;
    %join;
    %free S_000002b865babc00;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000002b865bb9fb0_0, 0;
T_31.12 ;
T_31.10 ;
T_31.7 ;
T_31.1 ;
    %jmp T_31;
    .thread T_31;
    .scope S_000002b865bb5bf0;
T_32 ;
    %wait E_000002b865acd520;
    %load/vec4 v000002b865bb8070_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_32.0, 8;
    %pushi/vec4 0, 0, 7;
    %assign/vec4 v000002b865bb7fd0_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000002b865bb81b0_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000002b865bb8a70_0, 0;
    %jmp T_32.1;
T_32.0 ;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000002b865bb8a70_0, 0;
    %load/vec4 v000002b865bb7a30_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_32.2, 8;
    %load/vec4 v000002b865bb8930_0;
    %load/vec4 v000002b865bb81b0_0;
    %load/vec4 v000002b865bb7fd0_0;
    %parti/s 6, 0, 2;
    %concat/vec4; draw_concat_vec4
    %pad/u 9;
    %ix/vec4 3;
    %ix/load 4, 0, 0; Constant delay
    %assign/vec4/a/d v000002b865bb7df0, 0, 4;
    %load/vec4 v000002b865bb7350_0;
    %load/vec4 v000002b865bb81b0_0;
    %load/vec4 v000002b865bb7fd0_0;
    %parti/s 6, 0, 2;
    %concat/vec4; draw_concat_vec4
    %pad/u 9;
    %ix/vec4 3;
    %ix/load 4, 0, 0; Constant delay
    %assign/vec4/a/d v000002b865bb69f0, 0, 4;
    %load/vec4 v000002b865bb7fd0_0;
    %pad/u 32;
    %cmpi/e 63, 0, 32;
    %jmp/0xz  T_32.4, 4;
    %pushi/vec4 0, 0, 7;
    %assign/vec4 v000002b865bb7fd0_0, 0;
    %load/vec4 v000002b865bb81b0_0;
    %inv;
    %assign/vec4 v000002b865bb81b0_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000002b865bb8a70_0, 0;
    %jmp T_32.5;
T_32.4 ;
    %load/vec4 v000002b865bb7fd0_0;
    %addi 1, 0, 7;
    %assign/vec4 v000002b865bb7fd0_0, 0;
T_32.5 ;
T_32.2 ;
T_32.1 ;
    %jmp T_32;
    .thread T_32;
    .scope S_000002b865bb5bf0;
T_33 ;
    %wait E_000002b865acd520;
    %load/vec4 v000002b865bb8070_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_33.0, 8;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000002b865bb6d10_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000002b865bb75d0_0, 0;
    %pushi/vec4 0, 0, 7;
    %assign/vec4 v000002b865bb87f0_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000002b865bb86b0_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000002b865bb73f0_0, 0;
    %jmp T_33.1;
T_33.0 ;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000002b865bb75d0_0, 0;
    %load/vec4 v000002b865bb87f0_0;
    %pad/u 32;
    %cmpi/ne 0, 0, 32;
    %jmp/0xz  T_33.2, 4;
    %load/vec4 v000002b865bb87f0_0;
    %subi 1, 0, 7;
    %assign/vec4 v000002b865bb87f0_0, 0;
T_33.2 ;
    %load/vec4 v000002b865bb87f0_0;
    %pad/u 32;
    %cmpi/e 0, 0, 32;
    %flag_get/vec4 4;
    %jmp/0 T_33.6, 4;
    %load/vec4 v000002b865bb86b0_0;
    %and;
T_33.6;
    %flag_set/vec4 8;
    %jmp/0xz  T_33.4, 8;
    %load/vec4 v000002b865bb73f0_0;
    %assign/vec4 v000002b865bb6d10_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000002b865bb75d0_0, 0;
    %pushi/vec4 64, 0, 7;
    %assign/vec4 v000002b865bb87f0_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000002b865bb86b0_0, 0;
T_33.4 ;
    %load/vec4 v000002b865bb8a70_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_33.7, 8;
    %load/vec4 v000002b865bb87f0_0;
    %pad/u 32;
    %cmpi/e 0, 0, 32;
    %flag_get/vec4 4;
    %jmp/0 T_33.11, 4;
    %load/vec4 v000002b865bb86b0_0;
    %nor/r;
    %and;
T_33.11;
    %flag_set/vec4 8;
    %jmp/0xz  T_33.9, 8;
    %load/vec4 v000002b865bb81b0_0;
    %inv;
    %assign/vec4 v000002b865bb6d10_0, 0;
    %alloc S_000002b865bb4f70;
    %load/vec4 v000002b865bb81b0_0;
    %inv;
    %store/vec4 v000002b865bb9470_0, 0, 1;
    %fork TD_tb_top_receiver.u_top.u_fft2.run_fft, S_000002b865bb4f70;
    %join;
    %free S_000002b865bb4f70;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000002b865bb75d0_0, 0;
    %pushi/vec4 64, 0, 7;
    %assign/vec4 v000002b865bb87f0_0, 0;
    %jmp T_33.10;
T_33.9 ;
    %load/vec4 v000002b865bb86b0_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_33.12, 8;
    %load/vec4 v000002b865bb81b0_0;
    %inv;
    %assign/vec4 v000002b865bb73f0_0, 0;
    %alloc S_000002b865bb4f70;
    %load/vec4 v000002b865bb81b0_0;
    %inv;
    %store/vec4 v000002b865bb9470_0, 0, 1;
    %fork TD_tb_top_receiver.u_top.u_fft2.run_fft, S_000002b865bb4f70;
    %join;
    %free S_000002b865bb4f70;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000002b865bb86b0_0, 0;
T_33.12 ;
T_33.10 ;
T_33.7 ;
T_33.1 ;
    %jmp T_33;
    .thread T_33;
    .scope S_000002b865bb60a0;
T_34 ;
    %wait E_000002b865acec20;
    %load/vec4 v000002b865bbdde0_0;
    %cmpi/s 32767, 0, 33;
    %flag_or 5, 4; GT is !LE
    %flag_inv 5;
    %jmp/0xz  T_34.0, 5;
    %pushi/vec4 32767, 0, 16;
    %store/vec4 v000002b865bbe060_0, 0, 16;
    %jmp T_34.1;
T_34.0 ;
    %load/vec4 v000002b865bbdde0_0;
    %pushi/vec4 4294950912, 0, 32;
    %concati/vec4 0, 0, 1;
    %cmp/s;
    %jmp/0xz  T_34.2, 5;
    %pushi/vec4 32768, 0, 16;
    %store/vec4 v000002b865bbe060_0, 0, 16;
    %jmp T_34.3;
T_34.2 ;
    %load/vec4 v000002b865bbdde0_0;
    %parti/s 16, 0, 2;
    %store/vec4 v000002b865bbe060_0, 0, 16;
T_34.3 ;
T_34.1 ;
    %load/vec4 v000002b865bbd5c0_0;
    %cmpi/s 32767, 0, 33;
    %flag_or 5, 4; GT is !LE
    %flag_inv 5;
    %jmp/0xz  T_34.4, 5;
    %pushi/vec4 32767, 0, 16;
    %store/vec4 v000002b865bbd2a0_0, 0, 16;
    %jmp T_34.5;
T_34.4 ;
    %load/vec4 v000002b865bbd5c0_0;
    %pushi/vec4 4294950912, 0, 32;
    %concati/vec4 0, 0, 1;
    %cmp/s;
    %jmp/0xz  T_34.6, 5;
    %pushi/vec4 32768, 0, 16;
    %store/vec4 v000002b865bbd2a0_0, 0, 16;
    %jmp T_34.7;
T_34.6 ;
    %load/vec4 v000002b865bbd5c0_0;
    %parti/s 16, 0, 2;
    %store/vec4 v000002b865bbd2a0_0, 0, 16;
T_34.7 ;
T_34.5 ;
    %jmp T_34;
    .thread T_34, $push;
    .scope S_000002b865bb4de0;
T_35 ;
    %wait E_000002b865acf3e0;
    %load/vec4 v000002b865bbd980_0;
    %cmpi/s 32767, 0, 33;
    %flag_or 5, 4; GT is !LE
    %flag_inv 5;
    %jmp/0xz  T_35.0, 5;
    %pushi/vec4 32767, 0, 16;
    %store/vec4 v000002b865bbcee0_0, 0, 16;
    %jmp T_35.1;
T_35.0 ;
    %load/vec4 v000002b865bbd980_0;
    %pushi/vec4 4294950912, 0, 32;
    %concati/vec4 0, 0, 1;
    %cmp/s;
    %jmp/0xz  T_35.2, 5;
    %pushi/vec4 32768, 0, 16;
    %store/vec4 v000002b865bbcee0_0, 0, 16;
    %jmp T_35.3;
T_35.2 ;
    %load/vec4 v000002b865bbd980_0;
    %parti/s 16, 0, 2;
    %store/vec4 v000002b865bbcee0_0, 0, 16;
T_35.3 ;
T_35.1 ;
    %load/vec4 v000002b865bbd3e0_0;
    %cmpi/s 32767, 0, 33;
    %flag_or 5, 4; GT is !LE
    %flag_inv 5;
    %jmp/0xz  T_35.4, 5;
    %pushi/vec4 32767, 0, 16;
    %store/vec4 v000002b865bbd700_0, 0, 16;
    %jmp T_35.5;
T_35.4 ;
    %load/vec4 v000002b865bbd3e0_0;
    %pushi/vec4 4294950912, 0, 32;
    %concati/vec4 0, 0, 1;
    %cmp/s;
    %jmp/0xz  T_35.6, 5;
    %pushi/vec4 32768, 0, 16;
    %store/vec4 v000002b865bbd700_0, 0, 16;
    %jmp T_35.7;
T_35.6 ;
    %load/vec4 v000002b865bbd3e0_0;
    %parti/s 16, 0, 2;
    %store/vec4 v000002b865bbd700_0, 0, 16;
T_35.7 ;
T_35.5 ;
    %jmp T_35;
    .thread T_35, $push;
    .scope S_000002b865bb6230;
T_36 ;
    %wait E_000002b865ad0560;
    %load/vec4 v000002b865bc99d0_0;
    %cmpi/s 32767, 0, 33;
    %flag_or 5, 4; GT is !LE
    %flag_inv 5;
    %jmp/0xz  T_36.0, 5;
    %pushi/vec4 32767, 0, 16;
    %store/vec4 v000002b865bc9610_0, 0, 16;
    %jmp T_36.1;
T_36.0 ;
    %load/vec4 v000002b865bc99d0_0;
    %pushi/vec4 4294950912, 0, 32;
    %concati/vec4 0, 0, 1;
    %cmp/s;
    %jmp/0xz  T_36.2, 5;
    %pushi/vec4 32768, 0, 16;
    %store/vec4 v000002b865bc9610_0, 0, 16;
    %jmp T_36.3;
T_36.2 ;
    %load/vec4 v000002b865bc99d0_0;
    %parti/s 16, 0, 2;
    %store/vec4 v000002b865bc9610_0, 0, 16;
T_36.3 ;
T_36.1 ;
    %load/vec4 v000002b865bca830_0;
    %cmpi/s 32767, 0, 33;
    %flag_or 5, 4; GT is !LE
    %flag_inv 5;
    %jmp/0xz  T_36.4, 5;
    %pushi/vec4 32767, 0, 16;
    %store/vec4 v000002b865bca3d0_0, 0, 16;
    %jmp T_36.5;
T_36.4 ;
    %load/vec4 v000002b865bca830_0;
    %pushi/vec4 4294950912, 0, 32;
    %concati/vec4 0, 0, 1;
    %cmp/s;
    %jmp/0xz  T_36.6, 5;
    %pushi/vec4 32768, 0, 16;
    %store/vec4 v000002b865bca3d0_0, 0, 16;
    %jmp T_36.7;
T_36.6 ;
    %load/vec4 v000002b865bca830_0;
    %parti/s 16, 0, 2;
    %store/vec4 v000002b865bca3d0_0, 0, 16;
T_36.7 ;
T_36.5 ;
    %jmp T_36;
    .thread T_36, $push;
    .scope S_000002b865bb63c0;
T_37 ;
    %wait E_000002b865acfd20;
    %load/vec4 v000002b865bc91b0_0;
    %cmpi/s 32767, 0, 33;
    %flag_or 5, 4; GT is !LE
    %flag_inv 5;
    %jmp/0xz  T_37.0, 5;
    %pushi/vec4 32767, 0, 16;
    %store/vec4 v000002b865bc9c50_0, 0, 16;
    %jmp T_37.1;
T_37.0 ;
    %load/vec4 v000002b865bc91b0_0;
    %pushi/vec4 4294950912, 0, 32;
    %concati/vec4 0, 0, 1;
    %cmp/s;
    %jmp/0xz  T_37.2, 5;
    %pushi/vec4 32768, 0, 16;
    %store/vec4 v000002b865bc9c50_0, 0, 16;
    %jmp T_37.3;
T_37.2 ;
    %load/vec4 v000002b865bc91b0_0;
    %parti/s 16, 0, 2;
    %store/vec4 v000002b865bc9c50_0, 0, 16;
T_37.3 ;
T_37.1 ;
    %load/vec4 v000002b865bc9890_0;
    %cmpi/s 32767, 0, 33;
    %flag_or 5, 4; GT is !LE
    %flag_inv 5;
    %jmp/0xz  T_37.4, 5;
    %pushi/vec4 32767, 0, 16;
    %store/vec4 v000002b865bc8e90_0, 0, 16;
    %jmp T_37.5;
T_37.4 ;
    %load/vec4 v000002b865bc9890_0;
    %pushi/vec4 4294950912, 0, 32;
    %concati/vec4 0, 0, 1;
    %cmp/s;
    %jmp/0xz  T_37.6, 5;
    %pushi/vec4 32768, 0, 16;
    %store/vec4 v000002b865bc8e90_0, 0, 16;
    %jmp T_37.7;
T_37.6 ;
    %load/vec4 v000002b865bc9890_0;
    %parti/s 16, 0, 2;
    %store/vec4 v000002b865bc8e90_0, 0, 16;
T_37.7 ;
T_37.5 ;
    %jmp T_37;
    .thread T_37, $push;
    .scope S_000002b865bb5a60;
T_38 ;
    %wait E_000002b865acd520;
    %load/vec4 v000002b865bcb370_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_38.0, 8;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000002b865bcb910_0, 0;
    %pushi/vec4 0, 0, 16;
    %assign/vec4 v000002b865bc9390_0, 0;
    %pushi/vec4 0, 0, 16;
    %assign/vec4 v000002b865bc9bb0_0, 0;
    %pushi/vec4 0, 0, 16;
    %assign/vec4 v000002b865bca5b0_0, 0;
    %pushi/vec4 0, 0, 16;
    %assign/vec4 v000002b865bc9f70_0, 0;
    %jmp T_38.1;
T_38.0 ;
    %load/vec4 v000002b865bcb2d0_0;
    %assign/vec4 v000002b865bcb910_0, 0;
    %load/vec4 v000002b865bcb2d0_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_38.2, 8;
    %load/vec4 v000002b865bcb0f0_0;
    %load/vec4 v000002b865bcbaf0_0;
    %store/vec4 v000002b865bbc4e0_0, 0, 16;
    %store/vec4 v000002b865bba960_0, 0, 16;
    %callf/vec4 TD_tb_top_receiver.u_top.u_zf.sat_add, S_000002b865bb5420;
    %assign/vec4 v000002b865bc9390_0, 0;
    %load/vec4 v000002b865bcb9b0_0;
    %load/vec4 v000002b865bcc310_0;
    %store/vec4 v000002b865bbc4e0_0, 0, 16;
    %store/vec4 v000002b865bba960_0, 0, 16;
    %callf/vec4 TD_tb_top_receiver.u_top.u_zf.sat_add, S_000002b865bb5420;
    %assign/vec4 v000002b865bc9bb0_0, 0;
    %load/vec4 v000002b865bcb050_0;
    %load/vec4 v000002b865bcb230_0;
    %store/vec4 v000002b865bbc4e0_0, 0, 16;
    %store/vec4 v000002b865bba960_0, 0, 16;
    %callf/vec4 TD_tb_top_receiver.u_top.u_zf.sat_add, S_000002b865bb5420;
    %assign/vec4 v000002b865bca5b0_0, 0;
    %load/vec4 v000002b865bcc3b0_0;
    %load/vec4 v000002b865bcb190_0;
    %store/vec4 v000002b865bbc4e0_0, 0, 16;
    %store/vec4 v000002b865bba960_0, 0, 16;
    %callf/vec4 TD_tb_top_receiver.u_top.u_zf.sat_add, S_000002b865bb5420;
    %assign/vec4 v000002b865bc9f70_0, 0;
    %jmp T_38.3;
T_38.2 ;
    %pushi/vec4 0, 0, 16;
    %assign/vec4 v000002b865bc9390_0, 0;
    %pushi/vec4 0, 0, 16;
    %assign/vec4 v000002b865bc9bb0_0, 0;
    %pushi/vec4 0, 0, 16;
    %assign/vec4 v000002b865bca5b0_0, 0;
    %pushi/vec4 0, 0, 16;
    %assign/vec4 v000002b865bc9f70_0, 0;
T_38.3 ;
T_38.1 ;
    %jmp T_38;
    .thread T_38;
    .scope S_000002b865bac3d0;
T_39 ;
    %wait E_000002b865ace060;
    %load/vec4 v000002b865baa370_0;
    %pad/s 32;
    %cmpi/s 0, 0, 32;
    %jmp/0xz  T_39.0, 5;
    %load/vec4 v000002b865baa370_0;
    %inv;
    %pushi/vec4 1, 0, 16;
    %add;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000002b865baa910, 4, 0;
    %load/vec4 v000002b865bab130_0;
    %inv;
    %pushi/vec4 1, 0, 16;
    %add;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000002b865ba95b0, 4, 0;
    %pushi/vec4 6434, 0, 16;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000002b865baa410, 4, 0;
    %jmp T_39.1;
T_39.0 ;
    %load/vec4 v000002b865baa370_0;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000002b865baa910, 4, 0;
    %load/vec4 v000002b865bab130_0;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000002b865ba95b0, 4, 0;
    %pushi/vec4 0, 0, 16;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000002b865baa410, 4, 0;
T_39.1 ;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000002b865baacd0_0, 0, 32;
T_39.2 ;
    %load/vec4 v000002b865baacd0_0;
    %cmpi/s 12, 0, 32;
    %jmp/0xz T_39.3, 5;
    %ix/getv/s 4, v000002b865baacd0_0;
    %load/vec4a v000002b865ba95b0, 4;
    %pad/s 32;
    %cmpi/s 0, 0, 32;
    %flag_or 5, 4; GT is !LE
    %flag_inv 5;
    %jmp/0xz  T_39.4, 5;
    %ix/getv/s 4, v000002b865baacd0_0;
    %load/vec4a v000002b865baa910, 4;
    %ix/getv/s 4, v000002b865baacd0_0;
    %load/vec4a v000002b865ba95b0, 4;
    %load/vec4 v000002b865baacd0_0;
    %ix/vec4 4;
    %shiftr/s 4;
    %add;
    %load/vec4 v000002b865baacd0_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %store/vec4a v000002b865baa910, 4, 0;
    %ix/getv/s 4, v000002b865baacd0_0;
    %load/vec4a v000002b865ba95b0, 4;
    %ix/getv/s 4, v000002b865baacd0_0;
    %load/vec4a v000002b865baa910, 4;
    %load/vec4 v000002b865baacd0_0;
    %ix/vec4 4;
    %shiftr/s 4;
    %sub;
    %load/vec4 v000002b865baacd0_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %store/vec4a v000002b865ba95b0, 4, 0;
    %ix/getv/s 4, v000002b865baacd0_0;
    %load/vec4a v000002b865baa410, 4;
    %ix/getv/s 4, v000002b865baacd0_0;
    %load/vec4a v000002b865baab90, 4;
    %add;
    %load/vec4 v000002b865baacd0_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %store/vec4a v000002b865baa410, 4, 0;
    %jmp T_39.5;
T_39.4 ;
    %ix/getv/s 4, v000002b865baacd0_0;
    %load/vec4a v000002b865baa910, 4;
    %ix/getv/s 4, v000002b865baacd0_0;
    %load/vec4a v000002b865ba95b0, 4;
    %load/vec4 v000002b865baacd0_0;
    %ix/vec4 4;
    %shiftr/s 4;
    %sub;
    %load/vec4 v000002b865baacd0_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %store/vec4a v000002b865baa910, 4, 0;
    %ix/getv/s 4, v000002b865baacd0_0;
    %load/vec4a v000002b865ba95b0, 4;
    %ix/getv/s 4, v000002b865baacd0_0;
    %load/vec4a v000002b865baa910, 4;
    %load/vec4 v000002b865baacd0_0;
    %ix/vec4 4;
    %shiftr/s 4;
    %add;
    %load/vec4 v000002b865baacd0_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %store/vec4a v000002b865ba95b0, 4, 0;
    %ix/getv/s 4, v000002b865baacd0_0;
    %load/vec4a v000002b865baa410, 4;
    %ix/getv/s 4, v000002b865baacd0_0;
    %load/vec4a v000002b865baab90, 4;
    %sub;
    %load/vec4 v000002b865baacd0_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %store/vec4a v000002b865baa410, 4, 0;
T_39.5 ;
    %load/vec4 v000002b865baacd0_0;
    %addi 1, 0, 32;
    %store/vec4 v000002b865baacd0_0, 0, 32;
    %jmp T_39.2;
T_39.3 ;
    %ix/load 4, 12, 0;
    %flag_set/imm 4, 0;
    %load/vec4a v000002b865baa410, 4;
    %store/vec4 v000002b865baa870_0, 0, 16;
    %jmp T_39;
    .thread T_39, $push;
    .scope S_000002b865bab5c0;
T_40 ;
    %wait E_000002b865acdba0;
    %load/vec4 v000002b865bb1b30_0;
    %pad/s 32;
    %cmpi/s 0, 0, 32;
    %jmp/0xz  T_40.0, 5;
    %load/vec4 v000002b865bb1b30_0;
    %inv;
    %pushi/vec4 1, 0, 16;
    %add;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000002b865bb07d0, 4, 0;
    %load/vec4 v000002b865bb23f0_0;
    %inv;
    %pushi/vec4 1, 0, 16;
    %add;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000002b865bb1310, 4, 0;
    %pushi/vec4 6434, 0, 16;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000002b865bb09b0, 4, 0;
    %jmp T_40.1;
T_40.0 ;
    %load/vec4 v000002b865bb1b30_0;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000002b865bb07d0, 4, 0;
    %load/vec4 v000002b865bb23f0_0;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000002b865bb1310, 4, 0;
    %pushi/vec4 0, 0, 16;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000002b865bb09b0, 4, 0;
T_40.1 ;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000002b865bb0af0_0, 0, 32;
T_40.2 ;
    %load/vec4 v000002b865bb0af0_0;
    %cmpi/s 12, 0, 32;
    %jmp/0xz T_40.3, 5;
    %ix/getv/s 4, v000002b865bb0af0_0;
    %load/vec4a v000002b865bb1310, 4;
    %pad/s 32;
    %cmpi/s 0, 0, 32;
    %flag_or 5, 4; GT is !LE
    %flag_inv 5;
    %jmp/0xz  T_40.4, 5;
    %ix/getv/s 4, v000002b865bb0af0_0;
    %load/vec4a v000002b865bb07d0, 4;
    %ix/getv/s 4, v000002b865bb0af0_0;
    %load/vec4a v000002b865bb1310, 4;
    %load/vec4 v000002b865bb0af0_0;
    %ix/vec4 4;
    %shiftr/s 4;
    %add;
    %load/vec4 v000002b865bb0af0_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %store/vec4a v000002b865bb07d0, 4, 0;
    %ix/getv/s 4, v000002b865bb0af0_0;
    %load/vec4a v000002b865bb1310, 4;
    %ix/getv/s 4, v000002b865bb0af0_0;
    %load/vec4a v000002b865bb07d0, 4;
    %load/vec4 v000002b865bb0af0_0;
    %ix/vec4 4;
    %shiftr/s 4;
    %sub;
    %load/vec4 v000002b865bb0af0_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %store/vec4a v000002b865bb1310, 4, 0;
    %ix/getv/s 4, v000002b865bb0af0_0;
    %load/vec4a v000002b865bb09b0, 4;
    %ix/getv/s 4, v000002b865bb0af0_0;
    %load/vec4a v000002b865bb16d0, 4;
    %add;
    %load/vec4 v000002b865bb0af0_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %store/vec4a v000002b865bb09b0, 4, 0;
    %jmp T_40.5;
T_40.4 ;
    %ix/getv/s 4, v000002b865bb0af0_0;
    %load/vec4a v000002b865bb07d0, 4;
    %ix/getv/s 4, v000002b865bb0af0_0;
    %load/vec4a v000002b865bb1310, 4;
    %load/vec4 v000002b865bb0af0_0;
    %ix/vec4 4;
    %shiftr/s 4;
    %sub;
    %load/vec4 v000002b865bb0af0_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %store/vec4a v000002b865bb07d0, 4, 0;
    %ix/getv/s 4, v000002b865bb0af0_0;
    %load/vec4a v000002b865bb1310, 4;
    %ix/getv/s 4, v000002b865bb0af0_0;
    %load/vec4a v000002b865bb07d0, 4;
    %load/vec4 v000002b865bb0af0_0;
    %ix/vec4 4;
    %shiftr/s 4;
    %add;
    %load/vec4 v000002b865bb0af0_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %store/vec4a v000002b865bb1310, 4, 0;
    %ix/getv/s 4, v000002b865bb0af0_0;
    %load/vec4a v000002b865bb09b0, 4;
    %ix/getv/s 4, v000002b865bb0af0_0;
    %load/vec4a v000002b865bb16d0, 4;
    %sub;
    %load/vec4 v000002b865bb0af0_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %store/vec4a v000002b865bb09b0, 4, 0;
T_40.5 ;
    %load/vec4 v000002b865bb0af0_0;
    %addi 1, 0, 32;
    %store/vec4 v000002b865bb0af0_0, 0, 32;
    %jmp T_40.2;
T_40.3 ;
    %ix/load 4, 12, 0;
    %flag_set/imm 4, 0;
    %load/vec4a v000002b865bb09b0, 4;
    %store/vec4 v000002b865bb13b0_0, 0, 16;
    %jmp T_40;
    .thread T_40, $push;
    .scope S_000002b865bac0b0;
T_41 ;
    %wait E_000002b865acda20;
    %load/vec4 v000002b865ba96f0_0;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000002b865ba9970, 4, 0;
    %load/vec4 v000002b865ba9790_0;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000002b865ba9650, 4, 0;
    %load/vec4 v000002b865baa7d0_0;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000002b865bab3b0, 4, 0;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000002b865baa0f0_0, 0, 32;
T_41.0 ;
    %load/vec4 v000002b865baa0f0_0;
    %cmpi/s 12, 0, 32;
    %jmp/0xz T_41.1, 5;
    %ix/getv/s 4, v000002b865baa0f0_0;
    %load/vec4a v000002b865bab3b0, 4;
    %pad/s 32;
    %cmpi/s 0, 0, 32;
    %flag_inv 5; GE is !LT
    %jmp/0xz  T_41.2, 5;
    %ix/getv/s 4, v000002b865baa0f0_0;
    %load/vec4a v000002b865ba9970, 4;
    %ix/getv/s 4, v000002b865baa0f0_0;
    %load/vec4a v000002b865ba9650, 4;
    %load/vec4 v000002b865baa0f0_0;
    %ix/vec4 4;
    %shiftr/s 4;
    %sub;
    %load/vec4 v000002b865baa0f0_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %store/vec4a v000002b865ba9970, 4, 0;
    %ix/getv/s 4, v000002b865baa0f0_0;
    %load/vec4a v000002b865ba9650, 4;
    %ix/getv/s 4, v000002b865baa0f0_0;
    %load/vec4a v000002b865ba9970, 4;
    %load/vec4 v000002b865baa0f0_0;
    %ix/vec4 4;
    %shiftr/s 4;
    %add;
    %load/vec4 v000002b865baa0f0_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %store/vec4a v000002b865ba9650, 4, 0;
    %ix/getv/s 4, v000002b865baa0f0_0;
    %load/vec4a v000002b865bab3b0, 4;
    %ix/getv/s 4, v000002b865baa0f0_0;
    %load/vec4a v000002b865baa730, 4;
    %sub;
    %load/vec4 v000002b865baa0f0_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %store/vec4a v000002b865bab3b0, 4, 0;
    %jmp T_41.3;
T_41.2 ;
    %ix/getv/s 4, v000002b865baa0f0_0;
    %load/vec4a v000002b865ba9970, 4;
    %ix/getv/s 4, v000002b865baa0f0_0;
    %load/vec4a v000002b865ba9650, 4;
    %load/vec4 v000002b865baa0f0_0;
    %ix/vec4 4;
    %shiftr/s 4;
    %add;
    %load/vec4 v000002b865baa0f0_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %store/vec4a v000002b865ba9970, 4, 0;
    %ix/getv/s 4, v000002b865baa0f0_0;
    %load/vec4a v000002b865ba9650, 4;
    %ix/getv/s 4, v000002b865baa0f0_0;
    %load/vec4a v000002b865ba9970, 4;
    %load/vec4 v000002b865baa0f0_0;
    %ix/vec4 4;
    %shiftr/s 4;
    %sub;
    %load/vec4 v000002b865baa0f0_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %store/vec4a v000002b865ba9650, 4, 0;
    %ix/getv/s 4, v000002b865baa0f0_0;
    %load/vec4a v000002b865bab3b0, 4;
    %ix/getv/s 4, v000002b865baa0f0_0;
    %load/vec4a v000002b865baa730, 4;
    %add;
    %load/vec4 v000002b865baa0f0_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %store/vec4a v000002b865bab3b0, 4, 0;
T_41.3 ;
    %load/vec4 v000002b865baa0f0_0;
    %addi 1, 0, 32;
    %store/vec4 v000002b865baa0f0_0, 0, 32;
    %jmp T_41.0;
T_41.1 ;
    %jmp T_41;
    .thread T_41, $push;
    .scope S_000002b865bac0b0;
T_42 ;
    %wait E_000002b865acd2a0;
    %load/vec4 v000002b865baad70_0;
    %ix/load 4, 11, 0;
    %flag_set/imm 4, 0;
    %shiftr/s 4;
    %pad/s 16;
    %store/vec4 v000002b865ba98d0_0, 0, 16;
    %load/vec4 v000002b865ba9830_0;
    %ix/load 4, 11, 0;
    %flag_set/imm 4, 0;
    %shiftr/s 4;
    %pad/s 16;
    %store/vec4 v000002b865baa690_0, 0, 16;
    %jmp T_42;
    .thread T_42, $push;
    .scope S_000002b865bac240;
T_43 ;
    %wait E_000002b865ace2a0;
    %load/vec4 v000002b865baa550_0;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000002b865baa190, 4, 0;
    %load/vec4 v000002b865baa5f0_0;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000002b865ba9fb0, 4, 0;
    %load/vec4 v000002b865bab310_0;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4a v000002b865baa230, 4, 0;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000002b865bab270_0, 0, 32;
T_43.0 ;
    %load/vec4 v000002b865bab270_0;
    %cmpi/s 12, 0, 32;
    %jmp/0xz T_43.1, 5;
    %ix/getv/s 4, v000002b865bab270_0;
    %load/vec4a v000002b865baa230, 4;
    %pad/s 32;
    %cmpi/s 0, 0, 32;
    %flag_inv 5; GE is !LT
    %jmp/0xz  T_43.2, 5;
    %ix/getv/s 4, v000002b865bab270_0;
    %load/vec4a v000002b865baa190, 4;
    %ix/getv/s 4, v000002b865bab270_0;
    %load/vec4a v000002b865ba9fb0, 4;
    %load/vec4 v000002b865bab270_0;
    %ix/vec4 4;
    %shiftr/s 4;
    %sub;
    %load/vec4 v000002b865bab270_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %store/vec4a v000002b865baa190, 4, 0;
    %ix/getv/s 4, v000002b865bab270_0;
    %load/vec4a v000002b865ba9fb0, 4;
    %ix/getv/s 4, v000002b865bab270_0;
    %load/vec4a v000002b865baa190, 4;
    %load/vec4 v000002b865bab270_0;
    %ix/vec4 4;
    %shiftr/s 4;
    %add;
    %load/vec4 v000002b865bab270_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %store/vec4a v000002b865ba9fb0, 4, 0;
    %ix/getv/s 4, v000002b865bab270_0;
    %load/vec4a v000002b865baa230, 4;
    %ix/getv/s 4, v000002b865bab270_0;
    %load/vec4a v000002b865baae10, 4;
    %sub;
    %load/vec4 v000002b865bab270_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %store/vec4a v000002b865baa230, 4, 0;
    %jmp T_43.3;
T_43.2 ;
    %ix/getv/s 4, v000002b865bab270_0;
    %load/vec4a v000002b865baa190, 4;
    %ix/getv/s 4, v000002b865bab270_0;
    %load/vec4a v000002b865ba9fb0, 4;
    %load/vec4 v000002b865bab270_0;
    %ix/vec4 4;
    %shiftr/s 4;
    %add;
    %load/vec4 v000002b865bab270_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %store/vec4a v000002b865baa190, 4, 0;
    %ix/getv/s 4, v000002b865bab270_0;
    %load/vec4a v000002b865ba9fb0, 4;
    %ix/getv/s 4, v000002b865bab270_0;
    %load/vec4a v000002b865baa190, 4;
    %load/vec4 v000002b865bab270_0;
    %ix/vec4 4;
    %shiftr/s 4;
    %sub;
    %load/vec4 v000002b865bab270_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %store/vec4a v000002b865ba9fb0, 4, 0;
    %ix/getv/s 4, v000002b865bab270_0;
    %load/vec4a v000002b865baa230, 4;
    %ix/getv/s 4, v000002b865bab270_0;
    %load/vec4a v000002b865baae10, 4;
    %add;
    %load/vec4 v000002b865bab270_0;
    %addi 1, 0, 32;
    %ix/vec4/s 4;
    %store/vec4a v000002b865baa230, 4, 0;
T_43.3 ;
    %load/vec4 v000002b865bab270_0;
    %addi 1, 0, 32;
    %store/vec4 v000002b865bab270_0, 0, 32;
    %jmp T_43.0;
T_43.1 ;
    %jmp T_43;
    .thread T_43, $push;
    .scope S_000002b865bac240;
T_44 ;
    %wait E_000002b865acdea0;
    %load/vec4 v000002b865baaff0_0;
    %ix/load 4, 11, 0;
    %flag_set/imm 4, 0;
    %shiftr/s 4;
    %pad/s 16;
    %store/vec4 v000002b865ba9e70_0, 0, 16;
    %load/vec4 v000002b865baa050_0;
    %ix/load 4, 11, 0;
    %flag_set/imm 4, 0;
    %shiftr/s 4;
    %pad/s 16;
    %store/vec4 v000002b865baaa50_0, 0, 16;
    %jmp T_44;
    .thread T_44, $push;
    .scope S_000002b8656a1fb0;
T_45 ;
    %wait E_000002b865acd520;
    %load/vec4 v000002b865bb0e10_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_45.0, 8;
    %pushi/vec4 0, 0, 6;
    %assign/vec4 v000002b865bb1f90_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000002b865bb0870_0, 0;
    %pushi/vec4 0, 0, 32;
    %assign/vec4 v000002b865bb2030_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000002b865bb1450_0, 0;
    %pushi/vec4 0, 0, 16;
    %assign/vec4 v000002b865bb19f0_0, 0;
    %pushi/vec4 0, 0, 16;
    %assign/vec4 v000002b865bb2350_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000002b865bb2170_0, 0;
    %jmp T_45.1;
T_45.0 ;
    %load/vec4 v000002b865bb1db0_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_45.2, 8;
    %load/vec4 v000002b865bb1590_0;
    %load/vec4 v000002b865bb0870_0;
    %load/vec4 v000002b865bb1f90_0;
    %concat/vec4; draw_concat_vec4
    %pad/u 9;
    %ix/vec4 3;
    %ix/load 4, 0, 0; Constant delay
    %assign/vec4/a/d v000002b865bb1950, 0, 4;
    %load/vec4 v000002b865bb05f0_0;
    %load/vec4 v000002b865bb0870_0;
    %load/vec4 v000002b865bb1f90_0;
    %concat/vec4; draw_concat_vec4
    %pad/u 9;
    %ix/vec4 3;
    %ix/load 4, 0, 0; Constant delay
    %assign/vec4/a/d v000002b865bb0b90, 0, 4;
    %load/vec4 v000002b865bb11d0_0;
    %load/vec4 v000002b865bb0870_0;
    %load/vec4 v000002b865bb1f90_0;
    %concat/vec4; draw_concat_vec4
    %pad/u 9;
    %ix/vec4 3;
    %ix/load 4, 0, 0; Constant delay
    %assign/vec4/a/d v000002b865bb1c70, 0, 4;
    %load/vec4 v000002b865bb1770_0;
    %load/vec4 v000002b865bb0870_0;
    %load/vec4 v000002b865bb1f90_0;
    %concat/vec4; draw_concat_vec4
    %pad/u 9;
    %ix/vec4 3;
    %ix/load 4, 0, 0; Constant delay
    %assign/vec4/a/d v000002b865bb0d70, 0, 4;
    %load/vec4 v000002b865bb1f90_0;
    %pad/u 32;
    %cmpi/e 0, 0, 32;
    %jmp/0xz  T_45.4, 4;
    %load/vec4 v000002b865bb20d0_0;
    %pad/s 32;
    %assign/vec4 v000002b865bb2030_0, 0;
    %load/vec4 v000002b865bb1f90_0;
    %addi 1, 0, 6;
    %assign/vec4 v000002b865bb1f90_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000002b865bb1450_0, 0;
    %jmp T_45.5;
T_45.4 ;
    %load/vec4 v000002b865bb1f90_0;
    %pad/u 32;
    %cmpi/e 63, 0, 32;
    %jmp/0xz  T_45.6, 4;
    %load/vec4 v000002b865bb2030_0;
    %load/vec4 v000002b865bb20d0_0;
    %pad/s 32;
    %add;
    %store/vec4 v000002b865bb2210_0, 0, 32;
    %load/vec4 v000002b865bb2210_0;
    %assign/vec4 v000002b865bb2030_0, 0;
    %pushi/vec4 0, 0, 6;
    %assign/vec4 v000002b865bb1f90_0, 0;
    %load/vec4 v000002b865bb0870_0;
    %inv;
    %assign/vec4 v000002b865bb0870_0, 0;
    %load/vec4 v000002b865bb2210_0;
    %ix/load 4, 7, 0;
    %flag_set/imm 4, 0;
    %shiftr/s 4;
    %pad/s 16;
    %assign/vec4 v000002b865bb2350_0, 0;
    %load/vec4 v000002b865bb2210_0;
    %ix/load 4, 7, 0;
    %flag_set/imm 4, 0;
    %shiftr/s 4;
    %pad/s 16;
    %assign/vec4 v000002b865bb19f0_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000002b865bb1450_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000002b865bb2170_0, 0;
    %jmp T_45.7;
T_45.6 ;
    %load/vec4 v000002b865bb2030_0;
    %load/vec4 v000002b865bb20d0_0;
    %pad/s 32;
    %add;
    %assign/vec4 v000002b865bb2030_0, 0;
    %load/vec4 v000002b865bb1f90_0;
    %addi 1, 0, 6;
    %assign/vec4 v000002b865bb1f90_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000002b865bb1450_0, 0;
T_45.7 ;
T_45.5 ;
    %jmp T_45.3;
T_45.2 ;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000002b865bb1450_0, 0;
T_45.3 ;
T_45.1 ;
    %jmp T_45;
    .thread T_45;
    .scope S_000002b8656a1fb0;
T_46 ;
    %wait E_000002b865accba0;
    %load/vec4 v000002b865bb1db0_0;
    %flag_set/vec4 9;
    %flag_get/vec4 9;
    %jmp/0 T_46.2, 9;
    %load/vec4 v000002b865bb2170_0;
    %and;
T_46.2;
    %flag_set/vec4 8;
    %jmp/0xz  T_46.0, 8;
    %load/vec4 v000002b865bb0870_0;
    %inv;
    %load/vec4 v000002b865bb1f90_0;
    %concat/vec4; draw_concat_vec4
    %pad/u 9;
    %ix/vec4 4;
    %load/vec4a v000002b865bb1950, 4;
    %assign/vec4 v000002b865bb1630_0, 0;
    %load/vec4 v000002b865bb0870_0;
    %inv;
    %load/vec4 v000002b865bb1f90_0;
    %concat/vec4; draw_concat_vec4
    %pad/u 9;
    %ix/vec4 4;
    %load/vec4a v000002b865bb0b90, 4;
    %assign/vec4 v000002b865bb14f0_0, 0;
    %load/vec4 v000002b865bb0870_0;
    %inv;
    %load/vec4 v000002b865bb1f90_0;
    %concat/vec4; draw_concat_vec4
    %pad/u 9;
    %ix/vec4 4;
    %load/vec4a v000002b865bb1c70, 4;
    %assign/vec4 v000002b865bb18b0_0, 0;
    %load/vec4 v000002b865bb0870_0;
    %inv;
    %load/vec4 v000002b865bb1f90_0;
    %concat/vec4; draw_concat_vec4
    %pad/u 9;
    %ix/vec4 4;
    %load/vec4a v000002b865bb0d70, 4;
    %assign/vec4 v000002b865bb1810_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000002b865bb2490_0, 0;
    %jmp T_46.1;
T_46.0 ;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000002b865bb2490_0, 0;
T_46.1 ;
    %jmp T_46;
    .thread T_46;
    .scope S_000002b8656a1fb0;
T_47 ;
    %wait E_000002b865acd520;
    %load/vec4 v000002b865bb0e10_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_47.0, 8;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000002b865bb1270_0, 0;
    %pushi/vec4 0, 0, 16;
    %assign/vec4 v000002b865bb0a50_0, 0;
    %pushi/vec4 0, 0, 16;
    %assign/vec4 v000002b865bb0c30_0, 0;
    %pushi/vec4 0, 0, 16;
    %assign/vec4 v000002b865bb0cd0_0, 0;
    %pushi/vec4 0, 0, 16;
    %assign/vec4 v000002b865bb1090_0, 0;
    %jmp T_47.1;
T_47.0 ;
    %load/vec4 v000002b865bb2490_0;
    %assign/vec4 v000002b865bb1270_0, 0;
    %load/vec4 v000002b865bb0f50_0;
    %assign/vec4 v000002b865bb0a50_0, 0;
    %load/vec4 v000002b865bb0eb0_0;
    %assign/vec4 v000002b865bb0c30_0, 0;
    %load/vec4 v000002b865bb0ff0_0;
    %assign/vec4 v000002b865bb0cd0_0, 0;
    %load/vec4 v000002b865bb0690_0;
    %assign/vec4 v000002b865bb1090_0, 0;
T_47.1 ;
    %jmp T_47;
    .thread T_47;
    .scope S_000002b8656a1fb0;
T_48 ;
    %wait E_000002b865accba0;
    %load/vec4 v000002b865bb1f90_0;
    %pad/u 32;
    %cmpi/e 63, 0, 32;
    %flag_get/vec4 4;
    %jmp/0 T_48.2, 4;
    %load/vec4 v000002b865bb1db0_0;
    %and;
T_48.2;
    %flag_set/vec4 8;
    %jmp/0xz  T_48.0, 8;
    %load/vec4 v000002b865bb2030_0;
    %ix/load 4, 7, 0;
    %flag_set/imm 4, 0;
    %shiftr/s 4;
    %vpi_call 7 201 "$display", "[DEBUG] Symbol Done. Sum_Err = %d, Avg_Err (Shift 7) = %d", v000002b865bb2030_0, S<0,vec4,s32> {1 0 0};
T_48.0 ;
    %jmp T_48;
    .thread T_48;
    .scope S_000002b8656a1fb0;
T_49 ;
    %wait E_000002b865accba0;
    %load/vec4 v000002b865bb1f90_0;
    %pad/u 32;
    %cmpi/e 0, 0, 32;
    %flag_get/vec4 4;
    %jmp/0 T_49.2, 4;
    %load/vec4 v000002b865bb1db0_0;
    %and;
T_49.2;
    %flag_set/vec4 8;
    %jmp/0xz  T_49.0, 8;
    %vpi_call 7 207 "$display", "[DEBUG] ang1 = %d, diff1 = %d", v000002b865bb1a90_0, v000002b865bb22b0_0 {0 0 0};
T_49.0 ;
    %jmp T_49;
    .thread T_49;
    .scope S_000002b865bab8e0;
T_50 ;
    %wait E_000002b865acd520;
    %load/vec4 v000002b865bb3dc0_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_50.0, 8;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000002b865bb3fa0_0, 0;
    %pushi/vec4 0, 0, 4;
    %assign/vec4 v000002b865bb3c80_0, 0;
    %jmp T_50.1;
T_50.0 ;
    %load/vec4 v000002b865bb27e0_0;
    %assign/vec4 v000002b865bb3fa0_0, 0;
    %load/vec4 v000002b865bb27e0_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_50.2, 8;
    %load/vec4 v000002b865bb33c0_0;
    %pad/s 32;
    %cmpi/s 0, 0, 32;
    %flag_get/vec4 5;
    %ix/load 4, 3, 0;
    %ix/load 5, 0, 0;
    %flag_set/imm 4, 0;
    %assign/vec4/off/d v000002b865bb3c80_0, 4, 5;
    %load/vec4 v000002b865bb0910_0;
    %pad/s 32;
    %cmpi/s 0, 0, 32;
    %flag_get/vec4 5;
    %ix/load 4, 2, 0;
    %ix/load 5, 0, 0;
    %flag_set/imm 4, 0;
    %assign/vec4/off/d v000002b865bb3c80_0, 4, 5;
    %load/vec4 v000002b865bb4360_0;
    %pad/s 32;
    %cmpi/s 0, 0, 32;
    %flag_get/vec4 5;
    %ix/load 4, 1, 0;
    %ix/load 5, 0, 0;
    %flag_set/imm 4, 0;
    %assign/vec4/off/d v000002b865bb3c80_0, 4, 5;
    %load/vec4 v000002b865bb3aa0_0;
    %pad/s 32;
    %cmpi/s 0, 0, 32;
    %flag_get/vec4 5;
    %ix/load 4, 0, 0;
    %ix/load 5, 0, 0;
    %flag_set/imm 4, 0;
    %assign/vec4/off/d v000002b865bb3c80_0, 4, 5;
T_50.2 ;
T_50.1 ;
    %jmp T_50;
    .thread T_50;
    .scope S_000002b865b33340;
T_51 ;
    %wait E_000002b865acd520;
    %load/vec4 v000002b865bcede0_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_51.0, 8;
    %pushi/vec4 0, 0, 3;
    %assign/vec4 v000002b865bccea0_0, 0;
    %pushi/vec4 0, 0, 6;
    %assign/vec4 v000002b865bcccc0_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000002b865bccc20_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000002b865bcdbc0_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000002b865bcc860_0, 0;
    %pushi/vec4 0, 0, 16;
    %assign/vec4 v000002b865bcda80_0, 0;
    %pushi/vec4 0, 0, 16;
    %assign/vec4 v000002b865bcd760_0, 0;
    %pushi/vec4 0, 0, 16;
    %assign/vec4 v000002b865bccb80_0, 0;
    %pushi/vec4 0, 0, 16;
    %assign/vec4 v000002b865bcd080_0, 0;
    %jmp T_51.1;
T_51.0 ;
    %load/vec4 v000002b865bccea0_0;
    %dup/vec4;
    %pushi/vec4 0, 0, 3;
    %cmp/u;
    %jmp/1 T_51.2, 6;
    %dup/vec4;
    %pushi/vec4 1, 0, 3;
    %cmp/u;
    %jmp/1 T_51.3, 6;
    %jmp T_51.4;
T_51.2 ;
    %pushi/vec4 0, 0, 6;
    %assign/vec4 v000002b865bcccc0_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000002b865bccc20_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000002b865bcdbc0_0, 0;
    %load/vec4 v000002b865bcc860_0;
    %flag_set/vec4 8;
    %jmp/1 T_51.7, 8;
    %load/vec4 v000002b865bcd9e0_0;
    %flag_set/vec4 10;
    %flag_get/vec4 10;
    %jmp/0 T_51.8, 10;
    %load/vec4 v000002b865bccd60_0;
    %and;
T_51.8;
    %flag_set/vec4 9;
    %flag_or 8, 9;
T_51.7;
    %jmp/0xz  T_51.5, 8;
    %pushi/vec4 1, 0, 3;
    %assign/vec4 v000002b865bccea0_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000002b865bccc20_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000002b865bcc860_0, 0;
T_51.5 ;
    %jmp T_51.4;
T_51.3 ;
    %load/vec4 v000002b865bce980_0;
    %assign/vec4 v000002b865bcda80_0, 0;
    %load/vec4 v000002b865bcd260_0;
    %assign/vec4 v000002b865bcd760_0, 0;
    %load/vec4 v000002b865bced40_0;
    %assign/vec4 v000002b865bccb80_0, 0;
    %load/vec4 v000002b865bce5c0_0;
    %assign/vec4 v000002b865bcd080_0, 0;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000002b865bcdbc0_0, 0;
    %load/vec4 v000002b865bcccc0_0;
    %pad/u 32;
    %cmpi/e 63, 0, 32;
    %jmp/0xz  T_51.9, 4;
    %pushi/vec4 0, 0, 3;
    %assign/vec4 v000002b865bccea0_0, 0;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000002b865bccc20_0, 0;
    %pushi/vec4 0, 0, 6;
    %assign/vec4 v000002b865bcccc0_0, 0;
    %jmp T_51.10;
T_51.9 ;
    %load/vec4 v000002b865bcccc0_0;
    %addi 1, 0, 6;
    %assign/vec4 v000002b865bcccc0_0, 0;
T_51.10 ;
    %load/vec4 v000002b865bcd9e0_0;
    %flag_set/vec4 9;
    %flag_get/vec4 9;
    %jmp/0 T_51.13, 9;
    %load/vec4 v000002b865bccd60_0;
    %and;
T_51.13;
    %flag_set/vec4 8;
    %jmp/0xz  T_51.11, 8;
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000002b865bcc860_0, 0;
T_51.11 ;
    %jmp T_51.4;
T_51.4 ;
    %pop/vec4 1;
T_51.1 ;
    %jmp T_51;
    .thread T_51;
    .scope S_000002b865b33340;
T_52 ;
    %wait E_000002b865acd520;
    %load/vec4 v000002b865bcede0_0;
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_52.0, 8;
    %pushi/vec4 0, 0, 1;
    %assign/vec4 v000002b865bcc7c0_0, 0;
    %jmp T_52.1;
T_52.0 ;
    %load/vec4 v000002b865bcd3a0_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_52.2, 8;
    %vpi_call 3 254 "$display", "[Probe 1] T=%t: ADC Input Valid", $time {0 0 0};
T_52.2 ;
    %load/vec4 v000002b865bce340_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_52.4, 8;
    %vpi_call 3 258 "$display", "[Probe 2] T=%t: Rotator Output Valid (FFT Input Start)", $time {0 0 0};
T_52.4 ;
    %load/vec4 v000002b865bcd9e0_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_52.6, 8;
    %vpi_call 3 262 "$display", "[Probe 3] T=%t: FFT1 Done Pulse!", $time {0 0 0};
    %pushi/vec4 1, 0, 1;
    %assign/vec4 v000002b865bcc7c0_0, 0;
T_52.6 ;
    %load/vec4 v000002b865bccea0_0;
    %pad/u 32;
    %cmpi/e 1, 0, 32;
    %jmp/0xz  T_52.8, 4;
    %vpi_call 3 268 "$display", "[Probe 4] T=%t: Reading FFT Data (Addr=%d)", $time, v000002b865bcccc0_0 {0 0 0};
T_52.8 ;
    %load/vec4 v000002b865bcec00_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_52.10, 8;
    %vpi_call 3 272 "$display", "[Probe 5] T=%t: ZF Output Valid", $time {0 0 0};
T_52.10 ;
    %load/vec4 v000002b865bcbff0_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_52.12, 8;
    %vpi_call 3 276 "$display", "[Probe 6] T=%t: CPE Output Valid (Final Output)", $time {0 0 0};
T_52.12 ;
    %load/vec4 v000002b865bcc7c0_0;
    %flag_set/vec4 9;
    %flag_get/vec4 9;
    %jmp/0 T_52.16, 9;
    %load/vec4 v000002b865bccea0_0;
    %pad/u 32;
    %pushi/vec4 0, 0, 32;
    %cmp/e;
    %flag_get/vec4 4;
    %and;
T_52.16;
    %flag_set/vec4 8;
    %jmp/0xz  T_52.14, 8;
T_52.14 ;
T_52.1 ;
    %jmp T_52;
    .thread T_52;
    .scope S_000002b865b3f170;
T_53 ;
    %delay 5000, 0;
    %load/vec4 v000002b865bcc9a0_0;
    %inv;
    %store/vec4 v000002b865bcc9a0_0, 0, 1;
    %jmp T_53;
    .thread T_53;
    .scope S_000002b865b3f170;
T_54 ;
    %vpi_call 2 83 "$readmemh", "golden_input_time.hex", v000002b865bcfc40 {0 0 0};
    %vpi_call 2 84 "$readmemh", "golden_h_inv.hex", v000002b865bcefc0 {0 0 0};
    %vpi_call 2 85 "$readmemh", "golden_final_out.hex", v000002b865bd00a0 {0 0 0};
    %vpi_call 2 86 "$readmemh", "golden_zf_out.hex", v000002b865bd0320 {0 0 0};
    %pushi/vec4 0, 0, 1;
    %store/vec4 v000002b865bcc9a0_0, 0, 1;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v000002b865bcf1a0_0, 0, 1;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v000002b865bd0000_0, 0, 1;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v000002b865bd0460_0, 0, 1;
    %pushi/vec4 0, 0, 16;
    %store/vec4 v000002b865bce2a0_0, 0, 16;
    %pushi/vec4 0, 0, 16;
    %store/vec4 v000002b865bce0c0_0, 0, 16;
    %pushi/vec4 0, 0, 16;
    %store/vec4 v000002b865bcca40_0, 0, 16;
    %pushi/vec4 0, 0, 16;
    %store/vec4 v000002b865bcea20_0, 0, 16;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %load/vec4a v000002b865bcefc0, 4;
    %split/vec4 16;
    %store/vec4 v000002b865bcf420_0, 0, 16;
    %store/vec4 v000002b865bcf6a0_0, 0, 16;
    %ix/load 4, 1, 0;
    %flag_set/imm 4, 0;
    %load/vec4a v000002b865bcefc0, 4;
    %split/vec4 16;
    %store/vec4 v000002b865bcfec0_0, 0, 16;
    %store/vec4 v000002b865bd0280_0, 0, 16;
    %ix/load 4, 2, 0;
    %flag_set/imm 4, 0;
    %load/vec4a v000002b865bcefc0, 4;
    %split/vec4 16;
    %store/vec4 v000002b865bcf740_0, 0, 16;
    %store/vec4 v000002b865bcf7e0_0, 0, 16;
    %ix/load 4, 3, 0;
    %flag_set/imm 4, 0;
    %load/vec4a v000002b865bcefc0, 4;
    %split/vec4 16;
    %store/vec4 v000002b865bcf240_0, 0, 16;
    %store/vec4 v000002b865bcf380_0, 0, 16;
    %vpi_call 2 101 "$display", "-------------------------------------------" {0 0 0};
    %vpi_call 2 102 "$display", "   TOP LEVEL VERIFICATION START            " {0 0 0};
    %vpi_call 2 103 "$display", "-------------------------------------------" {0 0 0};
    %vpi_call 2 104 "$display", "Loading H Matrix:" {0 0 0};
    %vpi_call 2 105 "$display", "H00 = %d + j%d", v000002b865bcf6a0_0, v000002b865bcf420_0 {0 0 0};
    %delay 100000, 0;
    %pushi/vec4 1, 0, 1;
    %store/vec4 v000002b865bcf1a0_0, 0, 1;
    %delay 50000, 0;
    %vpi_call 2 113 "$display", "Feeding ADC Data..." {0 0 0};
    %pushi/vec4 1, 0, 1;
    %store/vec4 v000002b865bd0460_0, 0, 1;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000002b865bcfe20_0, 0, 32;
T_54.0 ;
    %load/vec4 v000002b865bcfe20_0;
    %cmpi/s 64, 0, 32;
    %jmp/0xz T_54.1, 5;
    %wait E_000002b865accba0;
    %delay 1000, 0;
    %pushi/vec4 1, 0, 1;
    %store/vec4 v000002b865bd0000_0, 0, 1;
    %ix/getv/s 4, v000002b865bcfe20_0;
    %load/vec4a v000002b865bcfc40, 4;
    %split/vec4 16;
    %store/vec4 v000002b865bcea20_0, 0, 16;
    %split/vec4 16;
    %store/vec4 v000002b865bcca40_0, 0, 16;
    %split/vec4 16;
    %store/vec4 v000002b865bce0c0_0, 0, 16;
    %store/vec4 v000002b865bce2a0_0, 0, 16;
    %load/vec4 v000002b865bcfe20_0;
    %cmpi/e 0, 0, 32;
    %jmp/0xz  T_54.2, 4;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v000002b865bd0460_0, 0, 1;
T_54.2 ;
    %load/vec4 v000002b865bcfe20_0;
    %addi 1, 0, 32;
    %store/vec4 v000002b865bcfe20_0, 0, 32;
    %jmp T_54.0;
T_54.1 ;
    %vpi_call 2 133 "$display", "Feeding Dummy Data to flush pipeline..." {0 0 0};
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000002b865bcfe20_0, 0, 32;
T_54.4 ;
    %load/vec4 v000002b865bcfe20_0;
    %cmpi/s 84, 0, 32;
    %jmp/0xz T_54.5, 5;
    %wait E_000002b865accba0;
    %delay 1000, 0;
    %pushi/vec4 1, 0, 1;
    %store/vec4 v000002b865bd0000_0, 0, 1;
    %pushi/vec4 0, 0, 16;
    %store/vec4 v000002b865bce2a0_0, 0, 16;
    %pushi/vec4 0, 0, 16;
    %store/vec4 v000002b865bce0c0_0, 0, 16;
    %pushi/vec4 0, 0, 16;
    %store/vec4 v000002b865bcca40_0, 0, 16;
    %pushi/vec4 0, 0, 16;
    %store/vec4 v000002b865bcea20_0, 0, 16;
    %load/vec4 v000002b865bcfe20_0;
    %addi 1, 0, 32;
    %store/vec4 v000002b865bcfe20_0, 0, 32;
    %jmp T_54.4;
T_54.5 ;
    %wait E_000002b865accba0;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v000002b865bd0000_0, 0, 1;
    %pushi/vec4 0, 0, 16;
    %store/vec4 v000002b865bce2a0_0, 0, 16;
    %pushi/vec4 0, 0, 16;
    %store/vec4 v000002b865bce0c0_0, 0, 16;
    %pushi/vec4 0, 0, 16;
    %store/vec4 v000002b865bcca40_0, 0, 16;
    %pushi/vec4 0, 0, 16;
    %store/vec4 v000002b865bcea20_0, 0, 16;
    %vpi_call 2 147 "$display", "Data Feed Done. Waiting for Output..." {0 0 0};
    %delay 5000000, 0;
    %vpi_call 2 153 "$display", "-------------------------------------------" {0 0 0};
    %vpi_call 2 154 "$display", "   SIMULATION FINISHED                     " {0 0 0};
    %vpi_call 2 155 "$display", "-------------------------------------------" {0 0 0};
    %vpi_call 2 156 "$finish" {0 0 0};
    %end;
    .thread T_54;
    .scope S_000002b865b3f170;
T_55 ;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000002b865bcfa60_0, 0, 32;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000002b865bcf2e0_0, 0, 32;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000002b865bcf880_0, 0, 32;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000002b865bcf920_0, 0, 32;
    %end;
    .thread T_55;
    .scope S_000002b865b3f170;
T_56 ;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000002b865bcdf80_0, 0, 32;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000002b865bcc680_0, 0, 32;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000002b865bcd440_0, 0, 32;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000002b865bce020_0, 0, 32;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000002b865bcf4c0_0, 0, 32;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000002b865bd03c0_0, 0, 32;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000002b865bcf060_0, 0, 32;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v000002b865bcef20_0, 0, 32;
    %end;
    .thread T_56;
    .scope S_000002b865b3f170;
T_57 ;
    %wait E_000002b865accba0;
    %load/vec4 v000002b865bd0500_0;
    %flag_set/vec4 9;
    %flag_get/vec4 9;
    %jmp/0 T_57.2, 9;
    %load/vec4 v000002b865bcf880_0;
    %cmpi/s 64, 0, 32;
    %flag_get/vec4 5;
    %and;
T_57.2;
    %flag_set/vec4 8;
    %jmp/0xz  T_57.0, 8;
    %ix/getv/s 4, v000002b865bcf880_0;
    %load/vec4a v000002b865bd0320, 4;
    %split/vec4 16;
    %store/vec4 v000002b865bce7a0_0, 0, 16;
    %split/vec4 16;
    %store/vec4 v000002b865bcf9c0_0, 0, 16;
    %split/vec4 16;
    %store/vec4 v000002b865bcd4e0_0, 0, 16;
    %store/vec4 v000002b865bce700_0, 0, 16;
    %load/vec4 v000002b865bcdf80_0;
    %load/vec4 v000002b865bce700_0;
    %load/vec4 v000002b865bcff60_0;
    %sub;
    %store/vec4 v000002b865b266d0_0, 0, 16;
    %callf/vec4 TD_tb_top_receiver.abs16, S_000002b865b331b0;
    %add;
    %store/vec4 v000002b865bcdf80_0, 0, 32;
    %load/vec4 v000002b865bcc680_0;
    %load/vec4 v000002b865bcd4e0_0;
    %load/vec4 v000002b865bcee80_0;
    %sub;
    %store/vec4 v000002b865b266d0_0, 0, 16;
    %callf/vec4 TD_tb_top_receiver.abs16, S_000002b865b331b0;
    %add;
    %store/vec4 v000002b865bcc680_0, 0, 32;
    %load/vec4 v000002b865bcd440_0;
    %load/vec4 v000002b865bcf9c0_0;
    %load/vec4 v000002b865bcfce0_0;
    %sub;
    %store/vec4 v000002b865b266d0_0, 0, 16;
    %callf/vec4 TD_tb_top_receiver.abs16, S_000002b865b331b0;
    %add;
    %store/vec4 v000002b865bcd440_0, 0, 32;
    %load/vec4 v000002b865bce020_0;
    %load/vec4 v000002b865bce7a0_0;
    %load/vec4 v000002b865bcfb00_0;
    %sub;
    %store/vec4 v000002b865b266d0_0, 0, 16;
    %callf/vec4 TD_tb_top_receiver.abs16, S_000002b865b331b0;
    %add;
    %store/vec4 v000002b865bce020_0, 0, 32;
    %load/vec4 v000002b865bcf4c0_0;
    %load/vec4 v000002b865bce700_0;
    %load/vec4 v000002b865bcff60_0;
    %sub;
    %store/vec4 v000002b865b266d0_0, 0, 16;
    %callf/vec4 TD_tb_top_receiver.abs16, S_000002b865b331b0;
    %cmp/s;
    %jmp/0xz  T_57.3, 5;
    %load/vec4 v000002b865bce700_0;
    %load/vec4 v000002b865bcff60_0;
    %sub;
    %store/vec4 v000002b865b266d0_0, 0, 16;
    %callf/vec4 TD_tb_top_receiver.abs16, S_000002b865b331b0;
    %store/vec4 v000002b865bcf4c0_0, 0, 32;
T_57.3 ;
    %load/vec4 v000002b865bd03c0_0;
    %load/vec4 v000002b865bcd4e0_0;
    %load/vec4 v000002b865bcee80_0;
    %sub;
    %store/vec4 v000002b865b266d0_0, 0, 16;
    %callf/vec4 TD_tb_top_receiver.abs16, S_000002b865b331b0;
    %cmp/s;
    %jmp/0xz  T_57.5, 5;
    %load/vec4 v000002b865bcd4e0_0;
    %load/vec4 v000002b865bcee80_0;
    %sub;
    %store/vec4 v000002b865b266d0_0, 0, 16;
    %callf/vec4 TD_tb_top_receiver.abs16, S_000002b865b331b0;
    %store/vec4 v000002b865bd03c0_0, 0, 32;
T_57.5 ;
    %load/vec4 v000002b865bcf060_0;
    %load/vec4 v000002b865bcf9c0_0;
    %load/vec4 v000002b865bcfce0_0;
    %sub;
    %store/vec4 v000002b865b266d0_0, 0, 16;
    %callf/vec4 TD_tb_top_receiver.abs16, S_000002b865b331b0;
    %cmp/s;
    %jmp/0xz  T_57.7, 5;
    %load/vec4 v000002b865bcf9c0_0;
    %load/vec4 v000002b865bcfce0_0;
    %sub;
    %store/vec4 v000002b865b266d0_0, 0, 16;
    %callf/vec4 TD_tb_top_receiver.abs16, S_000002b865b331b0;
    %store/vec4 v000002b865bcf060_0, 0, 32;
T_57.7 ;
    %load/vec4 v000002b865bcef20_0;
    %load/vec4 v000002b865bce7a0_0;
    %load/vec4 v000002b865bcfb00_0;
    %sub;
    %store/vec4 v000002b865b266d0_0, 0, 16;
    %callf/vec4 TD_tb_top_receiver.abs16, S_000002b865b331b0;
    %cmp/s;
    %jmp/0xz  T_57.9, 5;
    %load/vec4 v000002b865bce7a0_0;
    %load/vec4 v000002b865bcfb00_0;
    %sub;
    %store/vec4 v000002b865b266d0_0, 0, 16;
    %callf/vec4 TD_tb_top_receiver.abs16, S_000002b865b331b0;
    %store/vec4 v000002b865bcef20_0, 0, 32;
T_57.9 ;
    %load/vec4 v000002b865bce700_0;
    %load/vec4 v000002b865bcff60_0;
    %cmp/ne;
    %jmp/1 T_57.15, 6;
    %flag_mov 8, 6;
    %load/vec4 v000002b865bcd4e0_0;
    %load/vec4 v000002b865bcee80_0;
    %cmp/ne;
    %flag_or 6, 8;
T_57.15;
    %jmp/1 T_57.14, 6;
    %flag_mov 8, 6;
    %load/vec4 v000002b865bcf9c0_0;
    %load/vec4 v000002b865bcfce0_0;
    %cmp/ne;
    %flag_or 6, 8;
T_57.14;
    %jmp/1 T_57.13, 6;
    %flag_mov 8, 6;
    %load/vec4 v000002b865bce7a0_0;
    %load/vec4 v000002b865bcfb00_0;
    %cmp/ne;
    %flag_or 6, 8;
T_57.13;
    %jmp/0xz  T_57.11, 6;
    %load/vec4 v000002b865bcf920_0;
    %addi 1, 0, 32;
    %store/vec4 v000002b865bcf920_0, 0, 32;
    %vpi_call 2 207 "$display", "[ZFCHK][%0d] T=%t DUT=(%d,%d)(%d,%d) GOLD=(%d,%d)(%d,%d)", v000002b865bcf880_0, $time, v000002b865bcff60_0, v000002b865bcee80_0, v000002b865bcfce0_0, v000002b865bcfb00_0, v000002b865bce700_0, v000002b865bcd4e0_0, v000002b865bcf9c0_0, v000002b865bce7a0_0 {0 0 0};
T_57.11 ;
    %load/vec4 v000002b865bcf880_0;
    %addi 1, 0, 32;
    %store/vec4 v000002b865bcf880_0, 0, 32;
T_57.0 ;
    %jmp T_57;
    .thread T_57;
    .scope S_000002b865b3f170;
T_58 ;
    %wait E_000002b865accba0;
    %load/vec4 v000002b865bcf100_0;
    %flag_set/vec4 9;
    %flag_get/vec4 9;
    %jmp/0 T_58.2, 9;
    %load/vec4 v000002b865bcfa60_0;
    %cmpi/s 64, 0, 32;
    %flag_get/vec4 5;
    %and;
T_58.2;
    %flag_set/vec4 8;
    %jmp/0xz  T_58.0, 8;
    %ix/getv/s 4, v000002b865bcfa60_0;
    %load/vec4a v000002b865bd00a0, 4;
    %split/vec4 16;
    %store/vec4 v000002b865bce480_0, 0, 16;
    %split/vec4 16;
    %store/vec4 v000002b865bce660_0, 0, 16;
    %split/vec4 16;
    %store/vec4 v000002b865bcd120_0, 0, 16;
    %store/vec4 v000002b865bce3e0_0, 0, 16;
    %load/vec4 v000002b865bce3e0_0;
    %pad/s 32;
    %cmpi/s 0, 0, 32;
    %flag_get/vec4 5;
    %ix/load 4, 3, 0;
    %flag_set/imm 4, 0;
    %store/vec4 v000002b865bccfe0_0, 4, 1;
    %load/vec4 v000002b865bcd120_0;
    %pad/s 32;
    %cmpi/s 0, 0, 32;
    %flag_get/vec4 5;
    %ix/load 4, 2, 0;
    %flag_set/imm 4, 0;
    %store/vec4 v000002b865bccfe0_0, 4, 1;
    %load/vec4 v000002b865bce660_0;
    %pad/s 32;
    %cmpi/s 0, 0, 32;
    %flag_get/vec4 5;
    %ix/load 4, 1, 0;
    %flag_set/imm 4, 0;
    %store/vec4 v000002b865bccfe0_0, 4, 1;
    %load/vec4 v000002b865bce480_0;
    %pad/s 32;
    %cmpi/s 0, 0, 32;
    %flag_get/vec4 5;
    %ix/load 4, 0, 0;
    %flag_set/imm 4, 0;
    %store/vec4 v000002b865bccfe0_0, 4, 1;
    %load/vec4 v000002b865bccfe0_0;
    %load/vec4 v000002b865bcf600_0;
    %cmp/ne;
    %jmp/0xz  T_58.3, 6;
    %load/vec4 v000002b865bcf2e0_0;
    %addi 1, 0, 32;
    %store/vec4 v000002b865bcf2e0_0, 0, 32;
    %vpi_call 2 226 "$display", "[CHECK][%0d] Time %t: DUT=%b GOLD=%b", v000002b865bcfa60_0, $time, v000002b865bcf600_0, v000002b865bccfe0_0 {0 0 0};
    %jmp T_58.4;
T_58.3 ;
    %vpi_call 2 228 "$display", "[CHECK][%0d] Time %t: Match %b", v000002b865bcfa60_0, $time, v000002b865bcf600_0 {0 0 0};
T_58.4 ;
    %load/vec4 v000002b865bcfa60_0;
    %addi 1, 0, 32;
    %store/vec4 v000002b865bcfa60_0, 0, 32;
T_58.0 ;
    %jmp T_58;
    .thread T_58;
    .scope S_000002b865b3f170;
T_59 ;
T_59.0 ;
    %load/vec4 v000002b865bcf1a0_0;
    %pushi/vec4 1, 0, 1;
    %cmp/e;
    %flag_get/vec4 6;
    %cmpi/ne 1, 0, 1;
    %jmp/0xz T_59.1, 6;
    %wait E_000002b865acc960;
    %jmp T_59.0;
T_59.1 ;
T_59.2 ;
    %load/vec4 v000002b865bcfa60_0;
    %pushi/vec4 64, 0, 32;
    %cmp/e;
    %flag_get/vec4 4;
    %cmpi/ne 1, 0, 1;
    %jmp/0xz T_59.3, 6;
    %wait E_000002b865acd860;
    %jmp T_59.2;
T_59.3 ;
    %vpi_call 2 238 "$display", "================================================" {0 0 0};
    %vpi_call 2 239 "$display", "Golden compare done: %0d mismatches over %0d outputs", v000002b865bcf2e0_0, P_000002b8656ce1c0 {0 0 0};
    %load/vec4 v000002b865bcf2e0_0;
    %cmpi/e 0, 0, 32;
    %jmp/0xz  T_59.4, 4;
    %vpi_call 2 241 "$display", "STATUS: PASS" {0 0 0};
    %jmp T_59.5;
T_59.4 ;
    %vpi_call 2 243 "$display", "STATUS: FAIL" {0 0 0};
T_59.5 ;
    %vpi_call 2 244 "$display", "ZF compare: %0d mismatches over %0d outputs", v000002b865bcf920_0, P_000002b8656ce1c0 {0 0 0};
    %load/vec4 v000002b865bcdf80_0;
    %cvt/rv/s;
    %pushi/real 1073741824, 4072; load=64.0000
    %div/wr;
    %load/vec4 v000002b865bcc680_0;
    %cvt/rv/s;
    %pushi/real 1073741824, 4072; load=64.0000
    %div/wr;
    %load/vec4 v000002b865bcd440_0;
    %cvt/rv/s;
    %pushi/real 1073741824, 4072; load=64.0000
    %div/wr;
    %load/vec4 v000002b865bce020_0;
    %cvt/rv/s;
    %pushi/real 1073741824, 4072; load=64.0000
    %div/wr;
    %vpi_call 2 245 "$display", "ZF avg abs err X1_re=%0f X1_im=%0f X2_re=%0f X2_im=%0f", W<3,r>, W<2,r>, W<1,r>, W<0,r> {0 4 0};
    %vpi_call 2 247 "$display", "ZF max abs err X1_re=%0d X1_im=%0d X2_re=%0d X2_im=%0d", v000002b865bcf4c0_0, v000002b865bd03c0_0, v000002b865bcf060_0, v000002b865bcef20_0 {0 0 0};
    %vpi_call 2 249 "$display", "================================================" {0 0 0};
    %end;
    .thread T_59;
    .scope S_000002b865b3f170;
T_60 ;
    %wait E_000002b865accba0;
    %load/vec4 v000002b865bcd6c0_0;
    %flag_set/vec4 8;
    %jmp/0xz  T_60.0, 8;
    %vpi_call 2 256 "$display", "[DBG][CPE->NCO] T=%t phase_err=%d nco_acc_before=%d", $time, v000002b865bccae0_0, v000002b865bcf560_0 {0 0 0};
T_60.0 ;
    %jmp T_60;
    .thread T_60;
    .scope S_000002b865b3f170;
T_61 ;
    %vpi_call 2 263 "$dumpfile", "top_level.vcd" {0 0 0};
    %vpi_call 2 264 "$dumpvars", 32'sb00000000000000000000000000000000, S_000002b865b3f170 {0 0 0};
    %end;
    .thread T_61;
# The file index is used to find the file name in the following table.
:file_names 14;
    "N/A";
    "<interactive>";
    "tb_top_receiver.v";
    "Top_level_receiver.v";
    "cfo_estimator_cp_mrc.v";
    "c_mul_fx.v";
    "cordic_vectoring.v";
    "cpe_tracker.v";
    "cordic_rotator.v";
    "QPSK_demap_mimo.v";
    "fft_64pt.v";
    "nco_phase_ctrl.v";
    "cfo_rotator.v";
    "mimo_zf_2x2.v";