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Merge pull request #2048 from hdinc/patch-1
ns16550.cc : fix handling clear rx/tx FIFO requests.
2 parents 737787f + d62d307 commit d4568f6

1 file changed

Lines changed: 4 additions & 4 deletions

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riscv/ns16550.cc

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -93,17 +93,17 @@ void ns16550_t::update_interrupt(void)
9393
uint8_t interrupts = 0;
9494

9595
/* Handle clear rx */
96-
if (lcr & UART_FCR_CLEAR_RCVR) {
97-
lcr &= ~UART_FCR_CLEAR_RCVR;
96+
if (fcr & UART_FCR_CLEAR_RCVR) {
97+
fcr &= ~UART_FCR_CLEAR_RCVR;
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while (!rx_queue.empty()) {
9999
rx_queue.pop();
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}
101101
lsr &= ~UART_LSR_DR;
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}
103103

104104
/* Handle clear tx */
105-
if (lcr & UART_FCR_CLEAR_XMIT) {
106-
lcr &= ~UART_FCR_CLEAR_XMIT;
105+
if (fcr & UART_FCR_CLEAR_XMIT) {
106+
fcr &= ~UART_FCR_CLEAR_XMIT;
107107
lsr |= UART_LSR_TEMT | UART_LSR_THRE;
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}
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