id_queue: Simplify existence lookup for Verilator speed-up #369
niwisAnnotations
1 error and 2 warnings
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Verilog Sources
Process completed with exit code 1.
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Verilog Sources:
src/id_queue.sv#L368
[verible-verilog-lint] reported by reviewdog 🐶
Line length exceeds max: 100; is: 102 [Style: line-length] [line-length]
Raw Output:
message:"Line length exceeds max: 100; is: 102 [Style: line-length] [line-length]" location:{path:"./src/id_queue.sv" range:{start:{line:368 column:101}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
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[verible-verilog-lint] src/id_queue.sv#L368:
src/id_queue.sv#L368
Line length exceeds max: 100; is: 102 [Style: line-length] [line-length]
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