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tools: verilate.py: add a SPI device bridge (QEMU / Verilator) #457

tools: verilate.py: add a SPI device bridge (QEMU / Verilator)

tools: verilate.py: add a SPI device bridge (QEMU / Verilator) #457

Triggered via pull request December 2, 2025 13:07
Status Failure
Total duration 47m 0s
Artifacts 3

ci_regression.yml

on: pull_request
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4 errors and 5 warnings
ROM_EXT / EG Regression
The process '/home/runner/.local/share/venv/bin/uv' failed with exit code 2
SiVal ROM_EXT / EG Regression
The process '/home/runner/.local/share/venv/bin/uv' failed with exit code 2
ROM / EG Regression
Process completed with exit code 1.
ROM / EG Regression
There were some unexpected test failures
ROM_EXT / EG Regression
Failed to restore: Cache service responded with 400
SiVal ROM_EXT / EG Regression
Some tests passed which we did not expect
SiVal ROM_EXT / EG Regression
Failed to restore: Cache service responded with 400
ROM / EG Regression
Some tests passed which we did not expect
ROM / EG Regression
Failed to restore: Cache service responded with 400

Artifacts

Produced during runtime
Name Size Digest
sim_qemu_rom_ext-bazel-test-results Expired
153 KB
sha256:fb238779661b25c4d9f4b1c896b6d021f5df7d2d15ebefcbf15e5288e2549c61
sim_qemu_rom_with_fake_keys-bazel-test-results Expired
155 KB
sha256:5965ed2259ded0a107ee407d2605357210a763b10ac1565ffe73a33be1e7efcd
sim_qemu_sival_rom_ext-bazel-test-results Expired
131 KB
sha256:9c60bab801ff7fc0a664fce192adb00d1bb0880a40468fac884d3d1114c74121