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tools: verilate.py: add a SPI device bridge (QEMU / Verilator) #455

tools: verilate.py: add a SPI device bridge (QEMU / Verilator)

tools: verilate.py: add a SPI device bridge (QEMU / Verilator) #455

Triggered via pull request December 2, 2025 11:45
Status Failure
Total duration 53m 40s
Artifacts 3

ci_regression.yml

on: pull_request
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5 errors and 5 warnings
ROM_EXT / EG Regression
The process '/home/runner/.local/share/venv/bin/uv' failed with exit code 2
SiVal ROM_EXT / EG Regression
Process completed with exit code 1.
SiVal ROM_EXT / EG Regression
There were some unexpected test failures
ROM / EG Regression
Process completed with exit code 1.
ROM / EG Regression
There were some unexpected test failures
ROM_EXT / EG Regression
Failed to restore: Cache service responded with 400
SiVal ROM_EXT / EG Regression
Some tests passed which we did not expect
SiVal ROM_EXT / EG Regression
Failed to restore: Cache service responded with 400
ROM / EG Regression
Some tests passed which we did not expect
ROM / EG Regression
Failed to restore: Cache service responded with 400

Artifacts

Produced during runtime
Name Size Digest
sim_qemu_rom_ext-bazel-test-results Expired
157 KB
sha256:83b6c95c4ce3cb7d4962f88ca588b82423f5757234de05b45f58cf938a7d66b5
sim_qemu_rom_with_fake_keys-bazel-test-results Expired
154 KB
sha256:07f17978c8da066e0d639ed431c3c13c09f1a38f0c24906e04df62af42d947dd
sim_qemu_sival_rom_ext-bazel-test-results Expired
131 KB
sha256:bbe58a113a7bbf12d45c371851e9c40c9a6281b5e7ef4887482417a6e3687812