Need help with LR2021 DC-DC workaround for LF

[UT2UH]

I am trying to implement DC-DC workaround to use NiceRF LoRa2021F33-2G4 module as DC-DC is an only option to get an output – it looks like VDCC1 and VDCC2 are not connected on module’s PCB at all.
The code of workaround was adapted from this one:
https://github.com/Lora-net/usp/tree/main/smtc_rac_lib/radio_drivers/lr20xx_driver
Here is the code:
https://github.com/UT2UH/RadioLib/tree/lr2021_dcdc
My problem is with lr20xx_workarounds_dcdc_reset (LR2021::workaroundDCDCreset()) that must be called after lr20xx_radio_common_set_pkt_type (LR2021:: setPacketType or LR2021::config ) – DC-DC frequency reset after workaround lr20xx_workarounds_dcdc_configure leads to -706/-707 wherever I place in LR2021::beginXX methods so I can not switch my device from sub-GHz LoRa to 2.4GHz FLRC when needed.

Any help or advise is highly appreciated.

[jgromes]

In LR2021 datasheet version 1.1, there is a section which seems related to this:

So from reading that I guess it should be applied after all calls to functions setting modulation parameters - in RadioLib, that would be towards the end of LR2021::begin. Mostly guessing here though since I did not need to use this workaround.

[UT2UH]

NiceRF support answered that the module do support LDO mode and I found very low power leakage from the module with SDR to confirm that LDO mode works. The problem is somewhere on my side. It looks like I damaged LF PA with wrong RF switch configuration.