Possible typo in Soan-Papdi board pin name: I09 should likely be IO9 (I-Zero-9 should be I-O-9 like other pins)

[ProbabilityEngineer]

PR #915 added support for the Soan-Papdi FPGA board. In the new board files, the final GPIO pin appears to be named I09 — capital
I, zero, nine — instead of IO9 — capital I, capital O, nine.

Affected files:

  app/resources/boards/Soan-Papdi/pinout.json
  app/resources/boards/Soan-Papdi/pinout.pcf

Current entries:

  {"name": "I09", "value": "18", "type": "inout"}

  set_io --warn-no-port I09 18

Nearby pins are named consistently as IO0 through IO8, so this seems likely to be a typo and should probably be:

  {"name": "IO9", "value": "18", "type": "inout"}

  set_io --warn-no-port IO9 18

This could cause users to create projects using IO9 and have the generated constraints fail to match the board definition.